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# Distinguished Hardware Security Engineer Hybrid/Remote

- **Company:** Cisco Systems, Inc.
- **Location:** San Jose, CA, United States
- **Salary:** $252,300.0 - $321,200.0
- **Contract:** Permanent contract
- **Skills:** Software System Penetration Testing, Computer Engineering, Federal Information Processing Standards (FIPS), Firmware, Field-Programmable Gate Array (FPGA), Hardware Security Module, Key Management, Public Key Infrastructure, Reduced Instruction Set Computing, Network Routers, Computer Networking Systems, Cloud Platform System, Application Specific Integrated Circuits, Information Technology
- **Published:** September 25, 2026
- **Apply:** https://www.sanjosejobsite.com/job.asp?id=3404620798&tx=VT7368THD&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54

## About the Role

* Education & Experience: BS/MS/PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 15+ years of experience in hardware systems design, silicon security, or embedded architecture.
 * Distinguished Technical Leadership: A track record as a Distinguished Engineer, Fellow, Chief Architect, or senior technical leader driving hardware security strategy at a top-tier networking, semiconductor, or hyperscale cloud company.
 * Hardware Systems & Networking Depth: Deep knowledge of complex networking systems (terabit switches, edge/core routers, security appliances, optical transceivers), board-level design, FPGA/ASIC development, and system-level cost/performance trade-offs, with direct experience across design, development, manufacturing, and product lifecycle management.
 * Applied Cryptography & Platform Security: Demonstrated knowledge of applied cryptography, PKI architectures, key management, and hardware security countermeasures such as side-channel (DPA/SPA) and fault-injection mitigations.
 * Multi-Functional & Executive Communication: Outstanding communication skills, with the ability to move fluidly between low-level silicon and firmware detail and executive-level strategy., * Standards & Consortia Contributions: Active contribution to, or leadership within, one or more hardware-security-focused industry standards groups such as OCP Security, TCG (TPM, DICE, CyRes), DMTF (SPDM), GlobalPlatform, FIDO Alliance, RISC-V Security, IEEE, NIST, or ETSI.
 * Advanced Platform Security: Hands-on experience with post-quantum cryptography, NIST SP 800-193 platform resiliency, secure enclave design, physical anti-tamper mechanisms, or authenticated lifecycle management.
 * Regulatory & Certification Leadership: Experience leading products through security certification and regulatory compliance programs such as FIPS 140-3, Common Criteria, CNSA, or PSA Certified.
 * Hardware Security Assessments: Experience conducting hardware security assessments, penetration testing, and/or side-channel resiliency testing against hardware and firmware targets.