> Markdown version of [/jobs/ext/3249291-senior-cpu-hw-performance-architect](https://www.wearedevelopers.com/jobs/ext/3249291-senior-cpu-hw-performance-architect). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior CPU HW Performance Architect - **Company:** Huawei - **Location:** Cambridge, UK - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Compilers, Computer Engineering, Microarchitecture, Software Debugging, Python (Programming Language), Software Engineering, Information Technology, Decoding, C++14 - **Published:** September 7, 2026 - **Apply:** https://www.apply4u.co.uk/jobs/senior-cpu-hw-performance-architect/46386941 ## About the Role UK Limited, Required: BS/MS in Computer Science, Computer Engineering, Electrical Engineering, or related field with 5+ years of relevant experience, or a PhD. Deep knowledge of CPU microarchitecture, focusing on areas such as fetch/decode, branch prediction, rename/dispatch, out-of-order execution, execution units, load/store, prefetching, or memory hierarchies. Solid understanding of performance, power, and area (PPA) trade-offs within high-performance CPU microarchitectures. Proficiency in advanced software engineering practices, performance profiling methodologies, and multi-language development (e.g., modern C++, Python). Strong analytical and debugging skills across complex systems. Excellent technical communication and cross-functional collaboration skills. Desired: Deep expertise in cutting-edge CPU architecture and microarchitecture. Track record of delivering microarchitectural innovations from concept to silicon. Hands-on experience with cycle-accurate simulators and performance models. Experience with pre-silicon performance analysis. Broad understanding of OS, compilers, and application-level workloads. Demonstrated leadership via patents, peer-reviewed publications, or notable industry impact. #J-18808-Ljbffr ## Description (PPA). Microarchitecture Definition: Define next-generation CPU microarchitecture and high-level specifications in close partnership with cross-functional hardware and software teams. Performance Modeling & Simulation: Build and refine cycle-accurate and functional simulators to evaluate emerging microarchitectural concepts. Architecture Exploration & Trade-offs: Propose novel microarchitectural features and quantify PPA impacts to drive balanced design decisions. Workload & Sensitivity Analysis: Profile target workloads, analyze bottlenecks, and identify architectural sensitivities to steer core optimization. This job description is only an outline of the tasks, responsibilities and outcomes required of the role. The jobholder will carry out any other duties as may be reasonably required by his/her line manager. The job description and personal specification may be reviewed on an ongoing basis in accordance with the changing needs of, Huawei Research and Development