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# Silicon Logical Design Engineer

- **Company:** Graphcore
- **Location:** Bristol, UK
- **Contract:** Permanent contract
- **Skills:** Computer Programming, Microarchitecture, Software Debugging, Logic Synthesis of Circuits, Python (Programming Language), CPU Design, Static Timing Analysis, SystemVerilog, Tcl (Programming Language), VHSIC Hardware Description Language (VHDL), Information Technology, Physical Design
- **Published:** September 8, 2026
- **Apply:** https://startup.jobs/logical-design-engineer-graphcore-9561924

## About the Role

* Degree in Computer Science, Engineering or a related subject
 * Digital design experience in a relevant industry
 * Be highly motivated, a self-starter, and a team player
 * Ability to work across teams and finding solutions to problems
 * Ability to solve design issues through programming, e.g. Python, Tcl
 * Strong competency in SystemVerilog or VHDL
 * Knowledge of digital design flows
 * Capable of managing time and priorities

Desirable:

 * Processor design
 * Application specific blocks
 * High-speed serial interfaces
 * Complex third-party IP integration
 * Experience leading teams
 * Arithmetic pipeline design
 * Floating-point design
 * Design for test
 * Synthesis
 * Timing Analysis
 * Logical Equivalence
 * Project Planning
 * Power Integrity
 * Silicon transistor knowledge

## Description

Working within the Logical Design team, the Silicon Logical Design Engineer is responsible for a wide range of logical design tasks which require working closely with other engineers within the Silicon department. This person is responsible for helping the team deliver high quality micro-architecture specifications and RTL for Graphcore chips, and assisting the rest of the Silicon teams to ensure we can meet the company objectives for silicon delivery., * Integrate IP and subsystems into top-level SoC designs

 * Develop and maintain build and configuration environments
 * Perform synthesis, linting, CDC/RDC, and timing checks at the SoC level
 * Support verification and physical design teams through clean interface hand-offs
 * Debug and resolve integration-related issues across multiple hierarchies
 * Contribute to the continuous improvement of integration flows and automation
 * Producing high quality microarchitecture and other documentation
 * Ensure good communication between sites to maintain consistent working practices