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# Hardware Engineer

- **Company:** Cisco Systems, Inc.
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Salary:** $154,900.0 - $225,300.0
- **Contract:** Permanent contract
- **Skills:** Adobe InDesign, Artificial Intelligence, BIOS, Ethernet, Firmware, Field-Programmable Gate Array (FPGA), Hardware Design, PCI Express, Signal Integrity, Verilog, Diagnostic Tools, Mentor Graphics, Pcb Layout, Physical Design, Cisco
- **Published:** September 25, 2026
- **Apply:** https://www.sanjosejobsite.com/job.asp?id=3404616260&tx=VT5954TYZ&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54

## About the Role

* 4+ years of experience with a Masters' degree or 7+ years of experience with a Bachelors' degree. Experience expected to be in hardware design.
 * Experience taking complex hardware products from concept to production.
 * Experience with industry-standard design suites, such as Cadence Allegro/Concept, Mentor Graphics Xpedition, etc., * Architectural Expertise: Deep proficiency in board design leveraging x86, ARM, and high-performance FPGA/SoC architectures.
 * High-Speed Design: Expert-level knowledge of high-speed interface bus design (PCIe Gen 4/5, DDR5, PAM4) and high-speed Ethernet (100G/400G).
 * Board-Mounted Power Design (Bonus): Demonstrated expertise in designing robust power delivery networks (PDN). Proficiency in selecting and implementing DC-DC converters, LDOs, and managing power sequencing for high-current, low-voltage processors, FPGAs, and ASICs.
 * Signal & Power Integrity: Advanced capability in modeling and mitigating signal integrity and power distribution challenges in dense, high-speed systems.
 * Firmware/RTL Interaction: Strong understanding of RTL design (Verilog/System-Verilog) and its interaction with hardware/BIOS.
 * Communication: Exceptional ability to communicate complex technical concepts to both technical and non-technical stakeholders.

## Description

As a Senior Hardware Design Engineer, you will serve as a technical lead for the development of Cisco's next-generation security hardware appliances. You will own the end-to-end hardware development lifecycle, from architectural definition to mass production. This role requires a high degree of autonomy, technical leadership, and the ability to drive innovation within a fast-paced environment. You will act as a subject matter expert, mentoring junior engineers and collaborating across global cross-functional teams to deliver carrier-grade products., * Technical Leadership: Lead the hardware development lifecycle for complex, high-performance security appliances, ensuring alignment with product roadmaps and architectural standards.

 * Design Ownership: Architect and drive the creation of complex circuit designs, schematics, and PCB layouts, ensuring optimal performance, signal integrity, and manufacturability.
 * System-Level Validation: Define and execute comprehensive design verification and validation (DVT) strategies, ensuring adherence to rigorous regulatory and performance specifications.
 * Advanced Troubleshooting: Serve as the primary technical authority for complex root cause analysis of hardware issues, including signal integrity, power distribution, and mechanical integration.
 * Strategic Collaboration: Act as a key technical liaison between hardware, software, BIOS, and manufacturing teams. Provide expert guidance to resolve cross-functional bottlenecks.
 * Process & Quality: Drive continuous improvement in design methodologies, maintain high-quality technical documentation, and conduct rigorous design reviews to mitigate risk.
 * Mentorship: Provide technical guidance and mentorship to junior engineering staff, fostering a culture of innovation and engineering excellence.
 * Integrate AI-driven design, simulation, and diagnostic tools to streamline design cycles, enhance predictive quality analysis, and improve overall operational efficiency


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