> Markdown version of [/jobs/ext/3293126-fpga-engineer](https://www.wearedevelopers.com/jobs/ext/3293126-fpga-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # FPGA Engineer - **Company:** Morgan McKinley - **Location:** Hampshire, UK - **Experience:** Starter - **Contract:** Permanent contract - **Skills:** Board Bringup, Software Debugging, Logic Synthesis of Circuits, Embedded Software, Ethernet, Formal Verification, Field-Programmable Gate Array (FPGA), PCI Express, Signal Integrity, Systems Architecture, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Serial Peripheral Interface, Fpga Hardware, ModelSim, SC Clearance, Information Technology - **Published:** September 10, 2026 - **Apply:** https://careers.asce.org/external-redirect-registration?JobId=598234&LinkSource=JobDetails ## About the Role * Education: Degree (BSc/MSc/PhD) in Electronic Engineering, Computer Science, Embedded Systems, or a related discipline. * RTL Development: Strong foundational knowledge or commercial experience in VHDL, Verilog, or SystemVerilog. * FPGA Toolchains: Hands-on familiarity with major vendor toolsets (e.g., AMD/Xilinx Vivado, Intel/Altera Quartus, or Microchip/Microsemi). * Protocols & Interfaces: Exposure to protocols such as PCIe, AXI, Ethernet, SPI, I2C, DDR memory controllers, or DSP algorithms. * Verification: Experience with simulation tools (ModelSim, Questa, Vivado Simulator) and verification methodologies., * Junior FPGA Engineer: Strong academic grounding or 1+ years of entry-level commercial experience in digital design; eager to learn under senior mentorship. * Mid-Level FPGA Engineer: Proven track record of delivering FPGA modules into production hardware, timing closure, and lab bring-up experience. * Senior / Principal FPGA Engineer: Demonstrated expertise in system-level FPGA architecture, high-speed design, complex verification frameworks, and technical leadership. Security Clearance & Eligibility Due to the sensitive nature of the projects, candidates must hold or be eligible to achieve standard Security Clearance (e.g., UK SC Clearance / National Security Vetting). ## Description * Design, implement, and verify complex FPGA-based solutions using VHDL, Verilog, or SystemVerilog across the full engineering lifecycle. * Conduct logic synthesis, place-and-route, constraint creation, and timing closure on high-density FPGA devices. * Build robust simulation testbenches and automated verification environments to ensure high-reliability performance. * Participate in hands-on hardware bring-up, lab integration, and signal integrity debugging using logic analyzers, oscilloscopes, and spectrum analyzers. * Work collaboratively with cross-functional teams spanning Hardware, Embedded Software, Systems, and RF engineering. * (Senior Levels): Lead FPGA system architecture definition, conduct code/design reviews, and mentor junior team members.