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# Test Engineer

- **Company:** INFT Solutions inc
- **Location:** Dallas, TX, United States
- **Experience:** Experienced
- **Contract:** Permanent contract
- **Skills:** Software Debugging, Digital Electronics, Joint Test Action (IEEE Standards), Release Management, Yield Optimization
- **Published:** September 8, 2026
- **Apply:** https://www.dice.com/job-detail/f68b8ad2-6c1a-4181-a491-6c678a71ea09

## About the Role

* Degree in Electronics / Electrical Engineering
 * 3-7 years of relevant Test Engineering experience preferred
 * Hands-on experience with Advantest 93K ATE SMT8 (required)
 * Experience using bench instrumentation for IC characterization
 * Solid knowledge of analog and digital electronics
 * Strong analytical and problem-solving skills with a hands-on lab mindset
 * Excellent verbal and written communication skills; able to work independently
 * Willingness to be based in San Jose, CA or Dallas, TX

## Description

Test program development for Digital, PMIC, RF & Mixed Signal products on Bench and (or) ATE primarily on Advantest 93k - SmarTest 7, SmarTest 8. Work closely with design engineers on first silicon debug, device characterization, test program bring-up, and production release activities across our San Jose, CA and Dallas, TX locations., Tessolve is looking for a hands-on Test Engineer to develop and bring up test programs for Digital, PMIC, RF, and Mixed Signal products on both Bench and ATE platforms (Advantest 93K - SmarTest 7/8). Partners closely with Design, Product, Quality, and Foundry Engineering teams from first silicon debug through production release., As a Test Engineer, you'll own test program development and debug for complex ICs spanning Digital, PMIC, RF, and Mixed Signal categories. You'll work at the intersection of silicon bring-up, device characterization, and production test collaborating directly with design engineers to resolve first-silicon issues and drive programs to volume production.

What You'll Do

 * Develop test programs for Digital, PMIC, RF & Mixed Signal products on Bench and/or ATE (Advantest 93K - SmarTest 7, SmarTest 8)
 * Partner with design engineers on first silicon debug, device characterization, test program bring-up, and production release
 * Debug digital vectors (JTAG/SCAN/ATPG/Functional/Mbist) and characterize devices across PVT (Process, Voltage, Temperature)
 * Characterize RF, PMIC, or Mixed Signal IP (ADC, DAC, PLL, etc.)
 * Support test program hand-off, production release, yield improvement, and test time reduction initiatives
 * Collaborate closely with Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams