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# FPGA Digital Design Engineer

- **Company:** BAE Systems
- **Location:** United States
- **Experience:** Expert
- **Salary:** $97,008.0 - $164,914.0
- **Contract:** Permanent contract
- **Skills:** C (Programming Language), C++ (Programming Language), Computer Programming, Continuous Integration, Software Debugging, Linux, Perl (Programming Language), Field-Programmable Gate Array (FPGA), Python (Programming Language), MATLAB, PCI Express, Static Timing Analysis, SystemVerilog, Systems Integration, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Scripting, ModelSim, Git, SC Clearance, Linux Development, Software Version Control
- **Published:** September 30, 2026
- **Apply:** https://www.thejobnetwork.com/job/98fa2f17-6d4c-4312-83bb-a2d210715ff0/fpga-design-senior-engineer

## About the Role

* BS degree in Electrical Engineering or related Science, Technology, Engineering and Mathematics (STEM) major obtained by start date.
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 * 4+ years VHDL/Verilog expertise.
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 * Expertise in clock domain crossing, timing analysis, revision control.
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 * Experience in hardware-software integration and validation.
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 * Familiarity with Xilinx, Intel, Microchip or Lattice devices and tool flows.
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 * Familiarity with the Linux environment and commands.
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 * Knowledge of C programming and scripting languages such as Perl, Tcl and Python.
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 * Ability to obtain a Secret clearance.
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 * Demonstrated effective communication, collaboration, and presentation skills
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Must be a U.S. Citizen; must be able to obtain/maintain a DoD Secret clearance\n
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Preferred Education, Experience, & Skills \n
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 * Advance knowledge of Digital Signal Processing
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 * Experience with architecture design in Matlab/Simulink.
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 * Experience with platforms as Vivado and Modelsim/QuestaSim.
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 * Experience with UVM/SystemVerilog, hardware debug.
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 * Experience with High-speed interfaces (PCIe).
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 * Proficiency in a Linux development environment.
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 * Proficiency using Git and CI/CD workflows.
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 * Knowledge of software programming languages such as C/ C++.
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 * Experience with Xilinx/AMD and MicroSemi/Microchip part families, internal FPGA fabric, and IP.
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 * Previous experience related to aerospace design techniques.
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 * Active DoD Secret or Top Secret clearance.
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