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# Staff SerDes Characterization Engineer, Platforms

- **Company:** Google LLC
- **Location:** Sunnyvale, CA, United States
- **Experience:** Experienced
- **Salary:** $188,000.0 - $274,000.0
- **Contract:** Permanent contract
- **Skills:** Automation of Tests, Bit Error Rate, Network Analysis, Code Coverage, Computer Programming, Computer Engineering, Data Recovery, Python (Programming Language), Signal Integrity, IEEE 802.3, Bit Error Rate Tester (BERT), Application Specific Integrated Circuits
- **Published:** September 10, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=cf41bf26718c9607

## About the Role

* Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
 * 6 years of experience in high-speed SerDes validation, physical layer testing, or RF/high-speed measurement.
 * 3 years of experience with transmitter and receiver characterization, JTOL testing, and high-speed BERT/AWG instrumentation., * PhD degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
 * Understanding of SerDes receiver architectures, clock/data recovery (CDR), and adaptive equalization algorithms.
 * Demonstrated expertise in developing custom calibration routines for stressed eye test setups and high frequency fixture de-embedding.
 * Strong programming skills in Python for automated test execution, statistical data processing, and yield analysis.
 * Excellent technical problem solving and cross-functional communication abilities.

## Description

* Own transmitter and receiver characterization and compliance testing for SerDes interfaces across next-generation compute and networking platforms.
 * Lead the development of advanced RX test methodologies, including jitter tolerance, stressed receiver sensitivity, bit error rate, and complex inter symbol interference channel testing. Interpret and map industry standards (IEEE 802.3, OIF-CEI) into rigorous, automated receiver test plans.
 * Master and deploy high-bandwidth lab instrumentation, including high-speed arbitrary waveform generators, bit error rate testers, real-time oscilloscopes, and vector network analyzers.
 * Collaborate closely with ASIC PHY design, silicon design and validation, and signal integrity teams to root-cause link performance anomalies and optimize TX and RX equalizer and DSP parameters.
 * Drive test automation development to maximize test coverage, measurement repeatability, and characterization efficiency.


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