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# Senior FPGA Engineer

- **Company:** Cambridge Aerospace
- **Location:** Cambridge, UK
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Board Bringup, Software Debugging, Linux, Digital Technology, Embedded Software, Field-Programmable Gate Array (FPGA), Hardware Design, Python (Programming Language), Verilog, Vivado, Digital Access Carrier System, Performance Testing
- **Published:** October 1, 2026
- **Apply:** https://www.apply4u.co.uk/jobs/senior-fpga-engineer/49337805

## About the Role

We are looking for a Senior FPGA Engineer to take technical ownership of complex FPGA-based designs, from early architecture through implementation, verification, and hardware bring-up. This role is suited to an experienced engineer who is comfortable making system-level design decisions, mentoring others, and delivering robust, production-ready RTL, while remaining actively hands-on in Verilog, simulation, and debugging. You will work on high-performance digital systems, potentially interfacing with RF, mixed-signal, or high-speed domains, and will play a key role in setting design quality and verification standards within the team. Responsibilities Lead the architecture, design, and implementation of FPGA solutions using Verilog HDL Translate system-level requirements into clear, maintainable RTL architectures Own complete design blocks from concept through to deployed hardware Review and guide Verilog written by other engineers, setting best practices Define and contribute to
verification strategies, including self-checking testbenches Support FPGA bring-up, debugging and performance validation on real hardware Work closely with hardware, RF, and embedded software teams to ensure clean integration Contribute to technical planning and risk reduction for future designs Provide technical mentorship to junior and mid-level engineers Requirements Deep understanding of Clock-domain crossing and reset strategies Pipelined architectures and timing closure FSM design, datapaths, and control logic Experience with modern FPGA tools (e.g. Xilinx Vivado; Intel Quartus) Confidence debugging across RTL, simulation and hardware Design and implementation of DSP blocks Nice to have Experience with RF or mixed-signal systems ADCs/DACs, clocking architectures, JESD-style interfaces Digital modulation concepts Familiarity with Linux/device tree configuration Experience with Python-based verification Familiarity with high-speed or SoC-based FPGA platforms Hands-on lab experience with