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# SOC Platform Architect - IP Power in , United States

- **Company:** Energy Jobline
- **Location:** United States (Remote available)
- **Experience:** Experienced
- **Salary:** $145,600.0 - $218,400.0
- **Contract:** Permanent contract
- **Skills:** Computer Programming, Software Debugging, Firmware, Network Switches, Application Specific Integrated Circuits, Caching
- **Published:** October 2, 2026
- **Apply:** https://www.energyjobline.com/job/soc-platform-architect-ip-power-united-states-31787673

## About the Role

Bachelor's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, or related work experience.
OR

Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, architecture, or related work experience.
Skills/Experience

Robust understanding of computer architecture
Experience in system power architecture/design as well as exposure to power estimation flows.
Basic understanding of end-end ASIC design flows
Knowledge in SOC and Infrastructure IP (NOC, SMMU, Caches) HW architecture
Exposure to some form of interconnect protocol
Exposure to programming for automation
Ability to quickly react and adapt to changes
Excellent communication skills
Qualification

Exposure to Quality of Service, Clocks, Power management, Security and Debug architectures and their respective software interfaces
Good knowledge in industry standard Interconnect Protocol and IO Devices Protocol
Understanding of HW-SW interfaces and firmware
Experience in post-silicon flows and debugs, * Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

## Description

The infrastructure IP Team consists of a multi-disciplinary group involved in the definition and design of Platform infrastructure HW components such as Interconnect (NOC), System Cache, Memory controllers and System MMU that are implemented in all Qualcomm SoCs. This position primarily involves working with HW designer to gather power estimation of SOC Infra HW IPs, analyze the data, identify architectural and micro-architectural bugs/limitations and propose fixes and/or optimizations for the same. The ideal candidate should have a strong background in ASIC design and computer architecture while demonstrating good system level design/architecture understanding. The candidate will be required to co-ordinate with domain leads to ensure a robust infrastructure deployment plan based on product requirements. It requires understanding of HW architecture, HW-&-SW feature trade-off, and the complete silicon HW end-2-end design flow., To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.