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# Hardware Design Engineer Technical Lead

- **Company:** Cisco Systems, Inc.
- **Location:** San Francisco, CA, United States
- **Experience:** Expert
- **Salary:** $171,600.0 - $245,000.0
- **Contract:** Permanent contract
- **Skills:** Board Bringup, Computer Engineering, Software Debugging, Dynamic Random-Access Memory, Ethernet, Field-Programmable Gate Array (FPGA), Hardware Design, Python (Programming Language), PCI Express, Schematic Capture, Signal Integrity, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Serial Peripheral Interface, Application Specific Integrated Circuits, System-level Testing
- **Published:** October 3, 2026
- **Apply:** https://www.sanfranciscogigs.com/job.asp?id=3417367646&tx=IT878TYI&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54

## About the Role

* Bachelor's degree in Electrical Engineering or Computer Engineering or Telecommunications and 8+ years of experience, or Master's degree in Electrical Engineering or Computer Engineering or Telecommunications and 6+ years of experience, or PhD in Electrical Engineering or Computer Engineering + 3 years in system level development.
 * Prior experience with common HW technology, including power, clock, memory, CPU, and variety of system interfaces.
 * Previous experience with complex high-speed board design and board bring-up.
 * Prior experience with schematics/layout, Hardware bring-up, trouble-shooting, system level testing.
 * Experience with working with Software team on system bring-up and porting, devices configuration (registers level).

Preferred Qualifications

 * Experience with schematics, PCB and Verilog HDL/VHDL design
 * Experience on the scripts (Python, Tcl, etc.)
 * Experience with lab bring up and design validation of products
 * Knowledge on the Ethernet protocol is a plus
 * Experience with access switch Ethernet interfaces: gigabit, multi gigabit, 10 gigabit.
 * Experience with high speed Ethernet interfaces: 25G, 100G, 400G, 800G.
 * Experience with DRAM, CPU subcomplex and control interfaces such as PCIe, I2C, SPI, MDC/MDIO
 * Self-motivation, teamwork and strong communication skills are essential.

## Description

* Define and design the next generation Hyperscaler Switch hardware based on Silicon One and/or merchant ASIC.
 * Responsible for system and board level specification, schematic capture, FPGA design, ASIC/System level bring up and troubleshooting.
 * The individual is expected to bring up the system to work with multiple groups including ASIC, DFT, Signal Integrity, software, Diagnostics and Manufacturing team to resolve any design issues.
 * Debug and troubleshoot in labs using scopes and analyzers
 * Act as technical liaison with major component Suppliers for the product


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