> Markdown version of [/jobs/ext/3569302-seniorstaff-engineer-digital-verification-and-methodology](https://www.wearedevelopers.com/jobs/ext/3569302-seniorstaff-engineer-digital-verification-and-methodology). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # SeniorStaff Engineer, Digital Verification and Methodology - **Company:** Infineon Technologies LLC - **Location:** United States - **Experience:** Expert - **Salary:** $121,840.0 - **Contract:** Permanent contract - **Skills:** C (Programming Language), Artificial Intelligence, Bash Shell, C++ (Programming Language), Computer Programming, Computer Engineering, Software Debugging, Digital Architecture, Ethernet, Firmware, Field-Programmable Gate Array (FPGA), Python (Programming Language), SystemVerilog, Tcl (Programming Language), Toolchain, Scripting, Application Specific Integrated Circuits - **Published:** October 3, 2026 - **Apply:** https://www.dice.com/job-detail/625f3f2e-414a-4f58-998b-a209f4057712 ## About the Role * Mandatory: Bachelor's ormaster's degree in electrical engineering, Computer Engineering, ComputerScience, or a related technical field * Mandatory: 5+ years in ASIC,SoC, or FPGA functional verification with ownership of complex block,subsystem, or chip-level deliverables * Mandatory: Expert proficiency in SystemVerilog,UVM, object-oriented testbench architecture, constrained-randomverification, functional coverage, and assertion-basedverification * Mandatory: Ability to translate specificationsand microarchitecture into verification plans, environments,tests, checkers, coverage models, and sign-off evidence * Mandatory: Written and spoken Englishat C1 level * Preferred: Strong debuggingskills with a major simulation and debug toolchain and proficiency in Linuxdevelopment and scripting or programming with Python, Tcl,Bash, C, or C++ for automation * Nice-to-have: Experience with RTLdesign and digital architecture plus exposure to Ethernet orcomplex protocols, security verification for cryptographicaccelerators or secure subsystems, power-aware verification using UPF,and practical use of AI or machine learning and AI-enabled EDAtools ## Description Join the thinkers, builders, and problem solvers behind tomorrow's technology.As a Senior Staff Engineer, Digital Verification and Methodology on our Research &Development team, you'll have theopportunity to merge creativity with yourtechnical expertise by shaping the future oftechnology, driving groundbreaking projects,and bringing new ideas to life. Are you in? Your role SeniorStaff Engineer, Digital Verification and Methodology. Join a collaborative teamthat values diverse perspectives and leads functional verification for advancedintegrated circuits while scaling reusable methodologies across globaldevelopment sites, * Lead end-to-end verificationstrategy from requirements analysis through sign-off * Architect reusable SystemVerilogUVM environments and scalable object-oriented testbenches * Implement constrained-randomand assertion-based verification with robust functional coverage * Drive metric-driven coverageclosure and establish clear quality criteria * Translate specificationsand microarchitecture into tests, checkers, coveragemodels, and sign-off evidence * Improve verification methodologies,automation, and tool flows across projects and development sites * Collaborate with design, firmware,and system teams to debug issues and ensure reliable hardware-softwareinteraction Your profile Youbring analytical thinking, clear communication, and collaborative problem-solving.You thrive in a globally distributed environment and build trust acrossfunctions while driving results