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# Staff Digital Design Engineer

- **Company:** AMD
- **Location:** Penicuik, UK (Remote available)
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Digital Electronics, Logic Synthesis of Circuits, Ethernet, PCI Express, SystemVerilog, Wireless Telecommunications, Application Specific Integrated Circuits, Data Center Networking, Power Analysis (Cryptography), Front End Software Development
- **Published:** October 6, 2026
- **Apply:** https://www.apply4u.co.uk/jobs/staff-digital-design-engineer/50593281

## About the Role

power analysis and power reduction techniques for optimization of digital circuitry, Experience in DSP algorithm developmentand implementationfor SerDes, wireless communications or high-speed serial interfaces (Ethernet, PCIe, etc.) Experience of simulation and modeling of DSP algorithms LOCATION Edinburgh, United Kingdom (Hybrid) #LI-ME #LI-HYBRID (0-3 days working from home) #LI-ONSITE Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from
all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's Responsible AI Policy is available here. This posting is for an existing vacancy. #J-18808-Ljbffr

## Description

DSP algorithms and circuits for 200+Gbps SerDes, with a strong focus on power efficiency and optimization. Your work will directly impact the performance and robustness of AMD's next-generation connectivity solutions for markets such as data center networking, wireless telecommunications, and aerospace/defense. KEY RESPONSIBILITIES: Collaborate with architects, hardware engineers, and verification engineers toimplementand refine new DSP features for cutting-edge and next-generation SerDes transceivers ImplementDSP algorithms for equalization, filtering and sequence detection RTL development using front-end ASIC tools(lint, synthesis, STA)to ensure the highest quality code Develop comprehensive documentation detailing DSP algorithm interactions with SerDes hardware and software components PREFERRED EXPERIENCE: Strong backgroundand experiencein digital design techniquesincluding clock domain crossing, RTL (preferably SystemVerilog), and ASIC front-end design tools and, flows Understanding of