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# Principal Performance Architect

- **Company:** Microsoft
- **Location:** Mountain View, CA, United States
- **Experience:** Experienced
- **Salary:** $142,800.0 - $274,800.0
- **Contract:** Permanent contract
- **Skills:** C (Programming Language), Artificial Intelligence, Microsoft Online Services, C++ (Programming Language), Computer Engineering, Python (Programming Language), Graphics Processing Unit (GPU), Information Technology
- **Published:** October 6, 2026
- **Apply:** https://www.jobmonkeyjobs.com/career/28081390/Principal-Performance-Architect-California-Mountain-View-1210

## About the Role

* Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience., * Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter., * MS or PhD in relevant CS/EE/CE
 * Experience in architecture and workload analysis on GPUs
 * 4+ years of experience with Python, C, C++
 * 6+ years of experience with performance modeling at various levels of abstraction, and analysis

Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.

## Description

* Actively collaborate with architects, and provide critical feedback for future SoC
 * Use models to analyze performance bottlenecks in SoC forcritical AI workloads
 * Opportunities for performance and power optimizations, and trade-offs on AI accelerators
 * Develop and test SoC and IP models, including model integration
 * Continuous collaboration with design and performance verification teams to close on SoC performance