> Markdown version of [/jobs/ext/3600692-fpga-embedded-engineer](https://www.wearedevelopers.com/jobs/ext/3600692-fpga-embedded-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # FPGA - Embedded Engineer - **Company:** Envisioneering, Inc - **Location:** Washington, DC, United States - **Experience:** Experienced - **Salary:** $140,000.0 - $160,000.0 - **Contract:** Permanent contract - **Skills:** Microsoft Windows, Abstraction Layers, Automation of Tests, C++ (Programming Language), Signals Intelligence, Computer Engineering, Software Debugging, Embedded Software, Ethernet, Field-Programmable Gate Array (FPGA), Hardware Description Language, Python (Programming Language), Linux System Administration, MATLAB, Radio-Frequency Identification, PCI Express, Real-Time Operating Systems, Signal Processing, SystemVerilog, Systems Integration, Verilog, VHSIC Hardware Description Language (VHDL), Data Processing, Serial Peripheral Interface, Fpga Hardware, Backend, Software Defined Radio - **Published:** October 7, 2026 - **Apply:** https://www.clearancejobs.com/jobs/9222246/fpga-embedded-engineer ## About the Role Envisioneering, Inc. is seeking a mid-level FPGA/Embedded Engineer to join our team supporting US Navy defense-related programs. The ideal candidate holds a B.S. in Engineering, has a minimum of 5 years of professional experience in FPGA development/embedded programming and holds an active U.S. security clearance at Secret level or higher. Work will involve FPGA and back-end development for radar/RF systems, data processing and analysis, automation, and instrument integration in mixed Windows and Linux environments., * DoD Secret Clearance that is active or was active within 24 months prior to date of hire. Core Hardware Description Languages (HDL): * Practical experience using VHDL (VHDL-2008 / VHDL-2019) and/or Verilog / SystemVerilog (Verilog-2001+) for RTL design targeting FPGAs and DSP processors. DSP & Signal Processing Implementation: * Hands-on experience developing, implementing, and optimizing digital signal processing (DSP) algorithms (e.g., filtering, FFTs, modulation/demodulation) directly on FPGAs and programmable DSP logic. * Ability to translate, simulate, and validate floating-point mathematical models (MATLAB / Simulink) into fixed-point FPGA implementations. * Experience developing signal processing algorithms tailored for wideband (>2 GHz) or narrowband RF signals. Embedded Firmware & Inter-Processor Interfaces: * Solid programming background in C and C++ for bare-metal embedded systems or Real-Time Operating Systems (RTOS). * Practical experience developing low-level FPGA drivers and hardware abstraction layers (HAL) in C/C++ to enable processor-to-FPGA communication. * Experience implementing standard bus, peripheral, and memory interfaces in FPGA logic (e.g., SPI, I2C, Ethernet, AXI4, and DDR memory controllers). Verification, Simulation & Test Automation: * Experience creating modular, self-checking chip-level and module-level testbenches for signal processing logic. * Ability to write test-automation scripts (e.g., Python, MATLAB, or C/C++) to generate input/output test vectors and compare hardware execution against simulated baseline models. * Hands-on experience integrating, debugging, and testing signal processing hardware in a laboratory environment using logic analyzers, oscilloscopes, and spectrum analyzers., * Domain Expertise: Prior exposure to DSP applications in Software-Defined Radio (SDR), Electronic Warfare (EW), Radar, or Signals Intelligence (SIGINT) systems. * High-Speed Interfacing: Familiarity with high-speed data converter and bus interfaces (e.g., JESD204B/C, PCIe, AXI4-Stream). * Advanced Verification: Exposure to structured verification frameworks (e.g., SystemVerilog UVM, Cocotb, or OSVVM/UVVM). EDUCATION: Bachelor's degree (BS) in Electrical Engineering, Computer Engineering, or a closely related field.