> Markdown version of [/jobs/ext/3614065-fpga-engineer](https://www.wearedevelopers.com/jobs/ext/3614065-fpga-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # FPGA Engineer - **Company:** Avanti Recruitment - **Location:** Cambridge, UK - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Board Bringup, Artificial Intelligence, Extract Transform Load (ETL), Software Debugging, Linux on Embedded Systems, Embedded Software, Field-Programmable Gate Array (FPGA), Python (Programming Language), System on a Chip, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Jupyter, Data Pipelines - **Published:** October 8, 2026 - **Apply:** https://www.careerjet.co.uk/jobad/gb5dc0ead5113bb7384c13c0417a78d678 ## About the Role You will be an experienced FPGA Engineer with strong hands-on RTL skills and experience with: * SoC-FPGA platforms * High-speed data acquisition * AXI and DMA * Timing closure and clock-domain crossing * FPGA-based DSP * Embedded software integration Experience with Zynq UltraScale+, PetaLinux, PYNQ, Python/Jupyter, imaging, instrumentation or AI acceleration would be advantageous. ## Description You will work with modern SoC-FPGA platforms, including technology such as Xilinx Zynq UltraScale, taking ownership of areas including: * VHDL / Verilog / SystemVerilog development * ADC and LVDS data acquisition * DMA and high-speed data movement * AXI interfaces and PS/PL integration * DDR memory and streaming pipelines * Clocking, timing closure and CDC * FPGA DSP including filters, FFT and cross-correlation * Hardware bring-up and debugging * Embedded Linux / PetaLinux integration * Longer-term FPGA-based CNN acceleration The role will evolve from building a reliable high-speed acquisition platform into implementing real-time DSP and reconstruction directly within FPGA fabric.