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# FPGA Engineer

- **Company:** IC Resources
- **Location:** Cambridge, UK
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Algorithm Design, Beamforming, C++ (Programming Language), Digital Arts, Electronic Design Automation, Field-Programmable Gate Array (FPGA), Hardware Design, Python (Programming Language), PCI Express, Software Requirements Analysis, Static Timing Analysis, SystemC, SystemVerilog, Verilog, Data Processing, Application Specific Integrated Circuits
- **Published:** October 9, 2026
- **Apply:** https://www.careerjet.co.uk/job/gb99b3ec422dce396b49961a6ed634c63a/eaa

## About the Role

They are looking for a Senior FPGA Engineer with the following background:

 * Strong RTL development using Verilog or SystemVerilog
 * Experience developing complex FPGA and/or ASIC designs
 * Strong knowledge of synthesis, timing analysis, and resource optimisation
 * Experience with high-throughput DSP or data-processing architectures
 * Strong simulation and verification experience
 * Knowledge of industry-standard EDA tools
 * Experience taking digital designs through the complete development lifecycle

Experience with 5G or communications DSP, error correction, beamforming, UVM, AMBA, PCIe, JESD, Python, C++/SystemC, or AMD FPGA platforms would be highly advantageous.

## Description

Develop the digital hardware helping bring 5G connectivity to satellite networks. We are supporting an innovative communications company building advanced baseband technology for non-terrestrial networks. They are looking for multiple Senior FPGA Engineers in Cambridge to develop high-performance IP for the latest generation of space-qualified devices.
Sitting between algorithm development and hardware implementation, you'll translate complex system requirements into efficient micro-architectures and RTL. You'll work across both FPGA and ASIC development, taking designs through verification, implementation, optimisation, and integration onto FPGA platforms.
With performance at the centre of the role, you'll optimise designs for throughput, timing, hardware resources, and power efficiency while collaborating with algorithm, architecture, verification, and physical implementation engineers.