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# Electrical Engineer - FPGA Firmware

- **Company:** Star, Inc.
- **Location:** United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Communications Protocols, Computer Engineering, Digital Electronics, Embedded Software, Ethernet, Firmware, Formal Verification, Field-Programmable Gate Array (FPGA), Hardware Design, PCI Express, Signal Processing, System on a Chip, Systems Integration, Verilog, VHSIC Hardware Description Language (VHDL), Change Tracking, Physical Design, Software Version Control
- **Published:** October 9, 2026
- **Apply:** https://www.thejobnetwork.com/job/3cdaca60-afb1-4741-8975-674428f74919/senior-electrical-engineer-fpga-firmware

## About the Role

* Education: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
 * Experience: 10+ years of professional experience designing and verifying FPGA gateware in VHDL or Verilog.
 * Experience with FPGA/SoC design toolchains, including synthesis, place-and-route, and timing closure.
 * Demonstrated experience implementing real-time control loops in reconfigurable logic.
 * Thorough understanding of version control best practices and tools for tracking changes to an FPGA baseline.

Desired Skills

 * Experience evaluating radiation-tolerant FPGA/SoC platforms, including Microchip RTG4/RT PolarFire nonvolatile configuration and AMD XQR Kintex UltraScale/XQR Versal SRAM-based configuration. Understand configuration-upset mitigation and scrubbing where applicable, plus separate risks in user memory, logic, processors, and transceivers.
 * Experience implementing DSP or signal-processing in FPGA fabric.
 * Familiarity with spacecraft communications protocols (CCSDS) such as AOS, EPP, TM/TC, SPP.
 * Experience with formal verification or advanced simulation methodologies, including transaction-based models for block- and top-level FPGA simulation.
 * Experience with high-speed serial interfaces (e.g., PCIe, SpaceWire, Ethernet), control interfaces (e.g., I2C, SPI, RS-232/422), and memory interfaces (e.g., DDR3/DDR4).
 * Experience with FPGA devices (e.g., AMD Kintex/Virtex UltraScale+, Microchip RTG4 or RT PolarFire) and processor-integrated SoCs (e.g., AMD Zynq UltraScale+ or XQR Versal), or equivalent platforms.
 * Familiarity with backplane-based architecture (e.g., SpaceVPX, VPX) and board-to-FPGA interface constraints.
 * Experience with NASA/DoD life cycle and technical reviews (e.g., SRR, PDR, CDR).
 * Experience mentoring engineers or establishing team-wide design standards.
 * Ability to prioritize assignments and complete design/project goals with minimal oversight in a fast-paced environment.

## Description

* Lead FPGA gateware architecture for real-time control loops, including beam-control servo logic for Pointing, Acquisition & Tracking (PAT), and co-own interfaces with digital hardware, embedded software, and systems leads.
 * Decompose and allocate system and board-level requirements to FPGA specifications, and architect solutions targeting FPGA/SoC platforms against those requirements.
 * Review product specifications and generate module-level block diagrams, flow diagrams, and design concepts for FPGA subsystems.
 * Drive timing closure, pipelining, and clock-domain crossing strategy for mission-critical designs.
 * Set partitioning strategy between hard processor subsystems and reconfigurable fabric on SoC platforms.
 * Lead full lifecycle development of VHDL or Verilog gateware, from architecture through simulation, integration, and test on the circuit card assembly.
 * Map FPGA simulation work products to system-level requirements and capabilities, using complex block- and top-level simulations to verify performance ahead of hardware integration.
 * Lead bench-level system integration of FPGA designs with hardware, firmware, and software.
 * Refine and enforce consistent firmware development processes and version control practices across FPGA designs.
 * Mentor firmware engineers and establish FPGA design/verification standards.
 * Select and qualify FPGA/SoC platforms and associated toolchains for high-reliability, space-flight applications.
 * Support qualification and production test efforts, including troubleshooting in the event of test failures.