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# Electrical Engineer (FPGA/VHDL)

- **Company:** RocketForce Technologies LLC
- **Location:** Mason, OH, United States
- **Experience:** Experienced
- **Contract:** Permanent contract
- **Skills:** Digital Electronics, Field-Programmable Gate Array (FPGA), Hardware Design, MATLAB, Scrum Methodology, Data Streaming, VHSIC Hardware Description Language (VHDL), Serial Peripheral Interface, ModelSim
- **Published:** October 10, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=9721ccfa5ef637ef

## About the Role

* Associates Degree in Electrical Engineering (EE, EET or ECE) and minimum 8 years prior related experience; OR Bachelor's Degree in Electrical Engineering (EE, EET, or ECE) and minimum 4 years prior related experience; OR Graduate/Master's Degree in Electrical Engineering (EE, EET, or ECE) and a minimum of 2 years of prior related experience.
 * Proficient knowledge of FPGAs and VHDL design including a minimum of 4 years of direct experience in:
 + ModelSim/Questa or equivalent logic simulation tools
 + MATLAB/Simulink
 + Standard streaming and memory mapped interfaces (Avalon, AMBA, etc.)
 + FPGA vendor tools (Microchip, Intel/Altera, AMD/Xilinx)

Preferred Additional Skills:

 * Proficiency in digital hardware design, interfaces, and architectures:
 + NAND, NOR, and DDR memory interfaces
 + GigE, 10GigE, GigE Vision
 + High Speed Serializers and Deserializers (SERDES)
 + LVDS, RS-422, I2C, SPI
 * Understanding of project/task management and technical estimating
 * Facilitate in continuous improvement activities
 * Working knowledge of manufacturing, assembly, and test processes
 * Must be able to obtain and maintain a DoD security clearance
 * Experience in design for test, quality, reliability, manufacturability, and EMC is a plus.
 * Experience in Agile Scrum development methods is a plus.

## Description

* Product Development
 + Design, implementation, verification, and integration of VHDL components.
 + Effective communication skills with internal customers.
 + Participate in VHDL peer reviews.
 * Analysis of component synthesis, timing, and clock domain crossings.
 * Technical presentations including internal design reviews.