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# Lead Hardware Design Validation Engineer

- **Company:** NVIDIA Corporation
- **Location:** Santa Clara, CA, United States
- **Experience:** Expert
- **Salary:** $168,000.0 - $258,750.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Data Centers, Software Debugging, Ethernet, Firmware, Hardware Design, Joint Test Action (IEEE Standards), Linux System Administration, PCI Express, Signal Integrity, Universal Asynchronous Receiver/Transmitter, Scripting, Serial Peripheral Interface, Yield Optimization
- **Published:** October 11, 2026
- **Apply:** https://www.juju.com/job/1_ScrapingHub33470-JR2018920

## About the Role

What we need to see: + BS+ in EE/CE or equivalent experience. + 8+ years of related experience with a proven track record as a technical lead for a shipping hardware product. + Proven leadership, leading validation through an entire product cycle from bring-up to mass production. + Strong system troubleshooting skills covering silicon, board, SI, firmware, OS, and applications. + Hands-on experience with power validation, including PDN, power regulators, sequencing, telemetry, protection etc. + Expertise in high-speed IO functionality and electrical validation, such as PCIe, SerDes, Ethernet, USB, or display. + Proficient in low-speed IO functionality and electrical validation, including I2C, SPI, UART, JTAG, SMBus, reference clock, etc. + System functional and stress test experience: define and complete system-level stress workloads (thermal, power, IO, memory, mixed-mode, corner V/F, Wide Area Test etc.) to expose marginality and uncover corner-case
failures. + Proficiency with lab equipment and scripting, comfortable in Linux environments including driver/firmware debug with strong communication and program management skills; able to lead across multiple teams, sites, and time zones. + Experience with manufacturing test plans, collaborating with OPs/CM/OEM teams, and driving production debug and yield improvement. + Willing to go to local manufacturing sites near Santa Clara (typically up to 5%) to support NPI builds and un-gate factory.
Ways to stand out from the crowd: + Experience leading validation for a GPU, server, automotive platform, or AI accelerator from first silicon to mass production. + Datacenter platform experience: high-density/rack-scale power, liquid cooling (CDU, manifolds, leak detection), manageability (BMC) etc. + Proven capability in managing or technically leading a team of validation engineers. + Able and willing to travel internationally (primarily to Asia mfg sites such as Taiwan, China mainland etc.), up to 8% during NPI peak, to support builds.

## Description

Represent design validation in executive and cross-functional product reviews and debug forums. + Be the accountable technical owner for validation status, risks, and different milestones/release readiness. + Define test plans across the full system based on product design, such as power, high-speed IO, low-speed IO, clock/resets, manageability (BMC), sensors, telemetry, firmware, full-system functional/stress validation etc. + Guide manufacturing test approaches; contribute to production troubleshooting and boosting yield. + Collaborate with and lead vendors and partners to complete validation activities. + Drive system-level debugging and root cause analysis on complex issues (including critical field returns) spanning silicon, board, system, signal integrity, firmware, and software. + Influence product design through design review and validation/debug feedback. + Build scalable validation automation and lab infrastructure across product lines.