> Markdown version of [/jobs/ext/3691256-mts-ai-optimized-memory-digital-design-engineer](https://www.wearedevelopers.com/jobs/ext/3691256-mts-ai-optimized-memory-digital-design-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # MTS, AI Optimized Memory Digital Design Engineer - **Company:** Micron's People Organization - **Location:** Folsom, CA, United States - **Experience:** Expert - **Salary:** $175,000.0 - $309,000.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, C++ (Programming Language), Computer Engineering, Logic Synthesis of Circuits, Python (Programming Language), SystemVerilog, Agentic-AI, AI Platforms, Information Technology, Programming Languages - **Published:** October 11, 2026 - **Apply:** https://www.juju.com/job/1_microntech1-43666921 ## About the Role This position offers the opportunity to work on tightly coupled, high-performance memory architectures for AI, balancing performance, power, area, and reliability while influencing critical design decisions across the development lifecycle. **Responsibilities:** + Translate architecture requirements into scalable microarchitectures and drive implementation from concept through silicon + Design, implement, and review SystemVerilog RTL for advanced memory system architectures + Perform synthesis and early PPA analysis to optimize area, power, and timing + Develop and maintain microarchitecture documentation that aligns design intent across teams + Evaluate architectural and implementation tradeoffs to support technical decision-making **Minimum Qualifications:** + Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field + Strong experience in digital design and microarchitecture development with ownership of hardware blocks from specification through implementation + Solid understanding of computer architecture and memory systems, including SoC-level behaviors and tradeoffs + Experience with synthesis flows and early PPA estimation and optimization + Proficiency in SystemVerilog and at least one programming language such as C, C++, or Python **Preferred Qualifications:** + Master's or PhD in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience + 5+ years of industry experience delivering silicon-proven memory systems or SoC hardware designs on modern process nodes + Familiarity with memory interfaces, reliability features, and media management concepts + Experience influencing architecture features with a strong understanding of RTL implementation cost and feasibility + Experience working with Agentic AI tools to assist with design and verification The US base salary range that Micron Technology estimates it could pay for this full-time position is, $175,000.00 - ## Description **Our vision is to transform how the world uses information to enrich life for** **_all_** **.** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron's AI-Optimized Memory Architecture team, where we are shaping the future of artificial intelligence workloads through next-generation memory solutions. We partner closely with customers to architect and deliver high-performance memory systems that enable emerging AI platforms and applications. Our team values innovation, technical excellence, and collaboration as we bring advanced memory technologies from concept to silicon. As a Member of Technical Staff, you will play a key role in translating architectural vision into efficient, silicon-proven hardware implementations.