> Markdown version of [/jobs/ext/3691404-digital-design-engineer](https://www.wearedevelopers.com/jobs/ext/3691404-digital-design-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Digital Design Engineer - **Company:** NVIDIA Corporation - **Location:** Santa Clara, CA, United States - **Experience:** Expert - **Salary:** $136,000.0 - $218,500.0 - **Contract:** Permanent contract - **Skills:** Computer Engineering, Microarchitecture, Logic Synthesis of Circuits, Ethernet, Formal Verification, PCI Express, Application Specific Integrated Circuits - **Published:** October 11, 2026 - **Apply:** https://www.juju.com/job/1_ScrapingHub33470-JR2019299 ## About the Role What we need to see: + Bachelors or Master's Degree, or equivalent experience in Electrical Engineering or Computer Engineering + 5+ years of relevant work experience. + Experience working with high-speed connectivity protocols such as NVLink, PCI-Express, Ethernet, UCIE etc. + Proven track record of delivering high bandwidth datapath blocks such as data movers, protocol adaptors, network-on-chip, arbiters and schedulers etc. + Deep understanding of ASIC design flows and methodology + Strong analytical and interpersonal skills, excellent teammate With highly competitive salaries and a comprehensive benefits package, NVIDIA is widely considered to be one of the technology world's most desirable employers. ## Description What you'll be doing: + As a key member of the NVLink Fusion design team, you will analyze the architectural requirements, perform the trade-off analysis for implementation, and deliver high performance, area and power efficient RTL Blocks. + Craft micro-architecture specification, implement in high-quality RTL, and deliver a fully verified, synthesis and timing clean block. + Collaborate with chip architects, verification engineers, formal verification engineers, and SoC integration engineers in order to meet the goals of the block in a timely manner + Identify potential IP solutions for specific use cases and assist in selecting, customizing and integrating the right IP solutions.