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# Principal FPGA Digital Design Engineer

- **Company:** Nbae Systems, Inc.
- **Location:** United States
- **Experience:** Expert
- **Salary:** $132,962.0 - $226,035.0
- **Contract:** Permanent contract
- **Skills:** C (Programming Language), Systems Engineering, C++ (Programming Language), Computer Programming, Continuous Integration, Software Debugging, Linux, Perl (Programming Language), Field-Programmable Gate Array (FPGA), Python (Programming Language), PCI Express, Static Timing Analysis, Systems Architecture, System on a Chip, SystemVerilog, Systems Integration, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Scripting, ModelSim, Gitlab, Git, Linux Development, Physical Design, Software Version Control
- **Published:** October 12, 2026
- **Apply:** https://www.thejobnetwork.com/job/58deb500-bf24-47ef-87a0-8838beb6db20/fpga-design-engineer-senior-principal

## About the Role

* BS degree in Electrical Engineering or related Science, Technology, Engineering and Mathematics (STEM) major obtained by start date.
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 * 8+ years VHDL/Verilog expertise.
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 * Expertise in developing advanced concepts and innovative technical solutions.
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 * Expertise in clock domain crossing, timing analysis, revision control.
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 * Experience in hardware-software integration and validation.
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 * Familiarity with Xilinx, Intel, Microchip or Lattice devices and tool flows.
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 * Familiarity with the Linux environment and commands.
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 * Knowledge of C programming and scripting languages such as Perl, Tcl and Python.
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 * Demonstrated effective communication, collaboration, and presentation skills
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 * Must be a U.S. Citizen; must be able to obtain/maintain a DoD Secret clearance
\n, * Advance knowledge of Digital Signal Processing
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 * Experience with architecture design in Matlab/Simulink.
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 * Experience with platforms as Vivado and Modelsim/QuestaSim.
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 * Experience with UVM/SystemVerilog, hardware debug.
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 * Experience with High-speed interfaces (PCIe).
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 * Proficiency in a Linux development environment.
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 * Proficiency using Git and CI/CD workflows.
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 * Knowledge of software programming languages such as C/ C++.
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 * Experience with Xilinx/AMD and MicroSemi/Microchip part families, internal FPGA fabric, and IP.
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 * Previous experience related to aerospace design techniques.
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 * Active DoD Secret or Top Secret clearance.
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## Description

nWe are seeking a Sr. Principal FPGA Digital Design Engineer who brings strong technical leadership, initiative, and a drive to push the boundaries of what's possible. In this role, you will work cross-functionally with hardware, software, and systems engineering teams, taking full ownership of high-impact design challenges from concept through delivery, and contributing innovative solutions to problems many consider unsolvable.\n
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\nBAE Systems offers a modern, flexible work environment that supports work-life balance-including a 9-days/80-hours pay period-and a mission-focused culture where every design delivers real-world impact.\n
Role Responsibilities\n
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 * Support program proposal development by defining technical solutions, estimating effort and budget, and collaborating with systems, hardware, and software teams to align with customer requirements.
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 * Serve as an expert in advanced digital, FPGA, and system-level design by contributing to research initiatives that develop leading-edge concepts and establish new engineering platform solutions.
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 * Translate FPGA design requirements from system-level inputs in close collaboration with hardware, systems, and software teams to ensure seamless FPGA performance and integration.
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 * Architect and implement FPGA designs across major device families (Xilinx, Intel, Microchip, Lattice) using VHDL, supporting applications ranging from gigabit-rate serial links and RF DSP to control loops, embedded processing, and processor-level interfaces.
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 * Innovate with next-generation FPGA platforms (Xilinx Zynq SoC, RFSoC), use SystemVerilog, UVM, and digital-twin co-simulation methodologies.
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 * Drive synthesis, place-and-route, static timing analysis, and overall design optimization.
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 * Build high-quality test benches, simulation environments, and static verification setups (Lint, Autocheck, CDC, RDC).
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 * Lead hands-on lab integration, perform daily real-time testing, and incorporate direct feedback from flight test operations and end users.
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 * Support development workflows and participate in formal specification and design reviews.
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 * Manage version control and configuration processes using Git/GitLab while maintaining accurate, up-to-date design documentation.
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 * Serve as a mentor to senior and junior design engineers and help strengthen overall team technical capability.
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 * Maintain full awareness of program schedules and budgets.
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