> Markdown version of [/jobs/ext/3696157-technical-program-manager-hardware](https://www.wearedevelopers.com/jobs/ext/3696157-technical-program-manager-hardware). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Technical Program Manager, Hardware - **Company:** Density AI, Inc. - **Location:** Mountain View, CA, United States - **Experience:** Expert - **Salary:** $129,000.0 - $300,000.0 - **Contract:** Permanent contract - **Skills:** Agile Methodology, Artificial Intelligence, Confluence, JIRA, C++ (Programming Language), Device Drivers, Firmware, Linux Kernel, Software Tools, System Programming, Application Specific Integrated Circuits, Physical Design - **Published:** October 12, 2026 - **Apply:** https://www.juju.com/job/16_1f57bd754 ## About the Role * 5+ years of technical program/project management in hardware, silicon, or deeply technical software, driving complex cross-functional programs to delivery * Strong technical fluency - you can hold your own with chip-design and software engineers and understand the dependencies between RTL/PD/DV/packaging and compiler/runtime/bring-up * Systems-programming background: hands-on C/C++ (and/or Rust), Linux internals, firmware, device drivers, or bring-up software - enough to read the code, dig into low-level issues, and earn engineers' trust * Demonstrated ownership of schedule, critical path, and risk on a large multi-team program, ideally through a silicon tapeout or a comparable hardware milestone. * Excellent communication and stakeholder management, from IC engineers to executives * Comfort operating in ambiguity at startup pace; bias to action; lightweight, high-trust process * (Optional) Silicon program experience through tapeout/bring-up; ASIC/SoC development lifecycle; hardware/software co-development; Jira/Confluence; PMP or Agile; AI/ML or accelerator domain ## Description Drive the cross-functional execution of our AI accelerator hardware program - owning the schedules, dependencies, and risk across silicon, board/system hardware, and the low-level software that brings it to life, from architecture through tapeout, bring-up, and scale-out. [+] You're technical enough to go a level deeper than a typical PM: comfortable in the systems-programming layer (firmware, drivers, bring-up software) where hardware and software meet, not just tracking it from the outside. What you'll do * Own end-to-end program management for major hardware workstreams - schedule, dependencies, critical path, and risk from architecture through tapeout and silicon bring-up * Drive cross-functional execution across silicon (design, DV, physical design, packaging), board/system hardware, and software teams; align milestones and clear dependencies * Bridge hardware and the systems-software stack, coordinate (and where useful, hands-on contribute to) firmware, device drivers, and bring-up software that exercises new silicon and boards * Run the program operating cadence. Planning, milestone tracking, status, risk reviews, and crisp executive communication * Identify critical-path risks and drive them to resolution before they slip the schedule; own tapeout readiness and milestone gating * Translate low-level technical blockers (bring-up failures, driver/firmware issues, HW/SW integration bugs) into program decisions, and help the team triage them rather than waiting on a single owner * Build lightweight tracking and process that scales with the team without slowing engineers down