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# C++ Software Engineer - Chip Design Tools

- **Company:** NVIDIA Corporation
- **Location:** Santa Clara, CA, United States
- **Experience:** Expert
- **Salary:** $152,000.0 - $241,500.0
- **Contract:** Permanent contract
- **Skills:** Very-Large-Scale Integration, C++ (Programming Language), Static Program Analysis, Databases, Software Engineering, Verilog, Information Technology, Build Tools, Front End Software Development, C++14, Golang
- **Published:** October 12, 2026
- **Apply:** https://www.juju.com/job/1_ScrapingHub33470-JR2009389

## About the Role

What We Need to See: + BS (or equivalent experience) and 5+ years of software development experience., MS (or PHD) preferred. + Experienced with C++ or Golang, Unix/Linux. + Solid understanding of algorithms, computer architecture and computer science theory + Experienced with VLSI frontend design and verification + Flexibility/adaptability for working in a global and dynamic environment with different frameworks and requirements Ways to stand out from the crowd: + Good architecture and RTL design knowledge + Strong expertise in modern C++, compiler, build systems, and database. + Experienced with static and dynamic code analysis tools Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

## Description

Our team is responsible for development and support of infrastructure tools used by design engineers for build and verification of architectural, rtl, and gate level designs.
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes.
What You'll be Doing: + Work as a team to build reliable, scalable and high performance software that are easy to use by hundreds of engineers worldwide. + Develop software tools in C++/Golang to analyze and construct chip designs described in C++, Verilog or domain-specific languages (DSLs). + Research and develop software solutions to allow greater efficiency in architecture, hardware and software teams. + Optimize the daily workflows of the world's top chip modelers and designers.