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# Design Engineer

- **Company:** DP PROFESSIONALS INC
- **Location:** Huntsville, AL, United States (Remote available)
- **Experience:** Expert
- **Contract:** Temporary contract
- **Skills:** Computer Engineering, Electronic Design Automation, Perl (Programming Language), Firmware, Field-Programmable Gate Array (FPGA), Hardware Description Language, Python (Programming Language), Object-Oriented Software Development, Static Timing Analysis, SystemVerilog, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Scripting, Application Specific Integrated Circuits, Linux Development, Physical Design, Software Defined Radio
- **Published:** October 12, 2026
- **Apply:** https://www.juju.com/job/2_164133506

## About the Role

* 7+ years of experience in ASIC design and implementation.
 * Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical discipline.
 * Experience with FPGA & ASIC design.
 * Proficiency in HDL programming (VHDL, Verilog, and/or SystemVerilog).
 * Experience with Linux development environment.
 * Experience with design verification and test bench development., * Advanced degree (MS/PhD) in Electrical Engineering, Computer Engineering, or related field.
 * Experience in full ASIC/FPGA lifecycle (architecture, design, simulation, verification, validation, integration & test).
 * Experience with Software-Defined Radio Architectures, ADC/DAC, and/or DSPs.
 * Knowledge of DSP and communications systems including spread spectrum, forward error correction, and modulation types (QPSK, QAM, PCM/FM, PAM).
 * Strong object-oriented programming and scripting skills (Python, TCL, Perl).
 * Experience with physical design flows and industry-standard EDA tools.
 * Experience with RTL2GDSII physical design and signoff flows.
 * Knowledge of deep sub-micron FinFET and CMOS technologies.
 * Experience with DFT/Scan/MBIST/LBIST methodologies. xrbllit
 * Experience mentoring junior engineers.

## Description

* Design and develop digital ASICs and FPGAs, and/or mixed-signal ASICs Implement designs using HDL (VHDL, Verilog, and/or SystemVerilog).
 * Develop verification methodologies and test benches for block and system-level verification.
 * Create and execute test plans, develop test harnesses, and implement coverage models.
 * Conduct timing analysis, noise analysis, and other signoff checks.
 * Collaborate with cross-functional teams including systems, firmware, architecture, and product engineering.
 * Support lab integration and troubleshooting activities.
 * Resolve design issues and drive solutions for timing, congestion, and other implementation challenges.