> Markdown version of [/jobs/ext/3711769-fpga-design-lead-digital-signal-processing-dsp](https://www.wearedevelopers.com/jobs/ext/3711769-fpga-design-lead-digital-signal-processing-dsp). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # FPGA Design Lead - Digital Signal Processing (DSP) - **Company:** BAE Systems - **Location:** Nashua, NH, United States - **Experience:** Expert - **Salary:** $149,603.0 - $254,317.0 - **Contract:** Permanent contract - **Skills:** C (Programming Language), IBM Rational ClearCase, Computer Engineering, Microarchitecture, Software Debugging, Perl (Programming Language), Field-Programmable Gate Array (FPGA), Python (Programming Language), Unix Shell, MATLAB, PCI Express, Subversion, SystemVerilog, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Application Specific Integrated Circuits, Fpga Hardware, ModelSim, Git, Software Version Control - **Published:** October 13, 2026 - **Apply:** https://www.techcareers.com/job.asp?id=3441712721&tx=FP3128FFP&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54 ## About the Role * 10 years of relevant experience with bachelor's degree (less with an advanced degree) * Current Security Clearance (Secret), or eligible to obtain one * Ability to distill higher level requirements into micro-architecture * Extensive experience in FPGA (preferred) or ASIC Design / Development * Experience leading/managing a design team * Experience with DSP fundamentals * Working understanding of Radar systems and/or EW systems * Proficient in VHDL (preferred) or Verilog HDL coding * Familiarity with Xilinx Vivado/ISE or Altera Quartus * Digital simulation using Modelsim/Questa * Strong understanding of timing driven design including clock domain crossing circuitry * Strong lab debug and problem solving skills * Strong written and oral communication skills * Ability to mentor and willingness to be mentored * Experience with high-speed interfaces like PCIe, SerDes, ADC/DAC, DDR3/4 * Familiarity with revision control (GIT, CVS, Clearcase, Subversion, etc.) * Proficient in Tcl/Tk and UNIX/Linux shell programming Preferred Education, Experience, & Skills * Experience with FPGA implementation * Experience with Matlab/Simulink * Experience creating unique designs and supporting legacy designs * Experience with UVM/System Verilog * Some experience with managing schedule and cost is beneficial * Experience with C/C , Perl and Python ## Description Electronic Combat Solutions Hardware Engineering Group is seeking a Senior Principal II FPGA Design Engineer to lead and develop a team of FPGA designer engineers through all phases of development. The ideal candidate is expected to perform activities including requirements generation and design architecture; technical oversight and mentoring of team members; as well as ownership of RTL coding, synthesis, basic test bench development, lab testing, and product support.