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# Applications Engineer, Senior Engineer

- **Company:** Synopsys
- **Location:** Austin, TX, United States
- **Experience:** Expert
- **Salary:** $95,000.0 - $142,000.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Bash Shell, Computer Engineering, Data Centers, Software Debugging, Logic Synthesis of Circuits, Perl (Programming Language), Formal Verification, Hardware Description Language, SystemVerilog, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Scripting, Software Version Control, Scheduling Algorithms
- **Published:** October 14, 2026
- **Apply:** https://diversityjobs.com/career/18626970/Applications-Engineer-Senior-Engineer-Texas-Austin

## About the Role

challenges and competitive gaps that R&D would not see from internal testing aloneAccelerate verification cycles for customers by introducing AI-driven productivity features, advanced debugging techniques, and optimized simulation configurationsStrengthen Synopsys' competitive position in the simulation market by winning head-to-head benchmarks and converting evaluations into long-term deploymentsImprove product quality and robustness by identifying edge cases, usability issues, and integration gaps during customer engagementsBuild deep technical relationships with leading semiconductor companies, becoming the trusted advisor they call when verification gets hardContribute to the success of chips powering AI, automotive, mobile, and data center applications by ensuring verification infrastructure does not become the bottleneckWhat You'll NeedBachelor's in Electronics or Computer Engineering with 5+ years of experience, or Master's with 3+ years, focused on digital design
verificationDeep hands-on experience with simulation technologies, including VCS or equivalent commercial simulators, and strong understanding of event-driven simulation internalsProficiency in SystemVerilog, UVM, SVA, and HDL languages like Verilog and VHDL, with the ability to read and debug complex testbenches and RTLProven track record debugging simulation mismatches, performance issues, and verification flow problems in production customer environmentsStrong scripting skills in Perl, TCL, Shell, and Make, with the ability to automate workflows and build tooling that improves engineer productivityWorking knowledge of UNIX/Linux environments, version control systems, and large-scale verification infrastructureExperience with Synopsys tools like Verdi, exposure to low-power simulation, gate-level verification, and functional safety methodologies is a strong plusWho You AreYou can walk into a customer war room, quickly assess a broken verification flow, and explain the root
cause and fix in terms that make sense to both the engineer debugging it and the manager who needs to know when the schedule recoversComfortable working across time zones with global R&D teams in India, Europe, and the U.S., balancing multiple customer escalations without losing track of the details that matterYou do not need to be the loudest person in the room, but you have a point of view and you push back when a proposed solution does not match the actual problemOrganized enough to manage five customer deployments, two competitive evaluations, and an R&D collaboration without dropping threads or missing follow-upsYou are genuinely curious about how things work under the hood, whether that is a simulator's scheduling algorithm or a customer's custom verification methodology, and that curiosity makes you better at solving problemsThe Team You'll Be Part OfYour recruiter will share more about the team structure and mission during the interview process.Rewards and
BenefitsWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

## Description

infrastructurePartner with field application engineers and R&D to translate customer pain points into actionable product requirements and validate fixes in real customer environmentsDrive competitive evaluations and benchmarking engagements, demonstrating VCS capabilities and building the technical case for adoptionDevelop automation scripts in Perl, TCL, Shell, and Make to streamline customer workflows, improve simulation throughput, and reduce manual interventionInterface with product validation and R&D teams to propose improvements in simulation accuracy, performance, and usability based on field feedbackSupport customers using advanced verification methodologies including UVM, SVA, low-power simulation, gate-level verification, and functional safety flowsThe Impact You Will HaveDirectly enable customer tape outs by resolving critical verification blockers that would otherwise delay silicon schedules by weeks or monthsShape the VCS product roadmap by surfacing real-world deployment