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# Kernel Optimization Software Engineer, SI Hardware

- **Company:** Tesla Motors
- **Location:** Palo Alto, CA, United States
- **Salary:** $176,000.0
- **Contract:** Permanent contract
- **Skills:** Compilers, Software Debugging, Distributed Systems, Hardware Design, Machine Learning, Performance Tuning, Software Engineering, Multithreading, Graphics Processing Unit (GPU), Pytorch, Large Language Models, LLVM, Information Technology, Deployment Automation, SGLang, Model Inference, MLIR (Multi-Level Intermediate Representation)
- **Published:** October 15, 2026
- **Apply:** https://jobs.localjobnetwork.com/apply/add/87117056/1

## About the Role

* Hands-on experience with kernel optimization, distributed systems, inference runtimes, or serving frameworks
 * Experience with LLMs, transformers, state space models, diffusion models, CNNs, and their performance characteristics
 * Familiarity with performance modeling and roofline analysis
 * Understanding of computer and GPU architecture, SIMD, multithreading, and/or other accelerators with vectorized instructions
 * Strong analytical and debugging skills
 * Ability to work across team boundaries with compiler, hardware, and ML teams
 * Degree in Engineering, Computer Science, or equivalent in experience and evidence of exceptional ability
 * Contributions to ML serving frameworks, compilers, and frameworks is a bonus (e.g. SGLang, LLVM, PyTorch, MLIR)

## Description

The Performance Optimization team takes research models and makes them run efficiently on Tesla's SI-ASICs, powering Autopilot and Optimus. This role sits at the intersection of SI research, compiler development, kernel optimization, and hardware design. You'll collaborate with SI researchers on novel quantization techniques, precision improvements, and non-standard architectures. You'll develop optimized kernels using our MLIR-based compiler stack to achieve real-time latency for self-driving and humanoid robots. You'll work directly with hardware teams to shape our next-generation SI5, SI6, and Dojo3 chips.
What You'll Do

 * Implement, optimize, and profile highly performant kernels for inference and training on Tesla's SI and Dojo ASICs
 * Optimize bottlenecks in the inference flow, make precision/performance tradeoff decisions, and develop novel techniques to improve hardware utilization and throughput
 * Work on a variety of edge and datacenter workloads, from small encoders/decoders to distributed LLM inference
 * Work with hardware teams to shape the next generation of Tesla hardware, evaluating architectural tradeoffs and balancing performance with versatility
 * Research and implement state-of-the-art machine learning techniques to achieve high performance on our hardware
 * Experiment with numerical methods and alternative architectures
 * Collaborate with the compiler team on programmability and performance