> Markdown version of [/jobs/ext/3779145-firmware-engineer-ii](https://www.wearedevelopers.com/jobs/ext/3779145-firmware-engineer-ii). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Firmware Engineer II - **Company:** Cadence Design Systems, Inc. - **Location:** Austin, TX, United States - **Contract:** Permanent contract - **Skills:** C (Programming Language), Application Programming Interfaces (APIs), Software Debugging, Electronic Design Automation, Perl (Programming Language), Embedded Software, Firmware, Python (Programming Language), Subsystems, Tcl (Programming Language), Scripting, PIC Microcontroller, Bare Metal, Front End Software Development - **Published:** October 16, 2026 - **Apply:** https://www.juju.com/job/1_cadencedsinc-Firmware ## About the Role Required Skills: * Good Knowledge of DDR5 JEDEC spec, knowledge of different DIMM configurations and specifications. * Relevant experience in developing bare-metal firmware for High-speed SerDes or Memory interface Physical Layer blocks. * Good Knowledge of C programming language for embedded software development and use of relevant IDE. * Comfortable debugging RTL simulations involving firmware and microcontroller subsystem. * Good knowledge of Shell/Perl/Python/TCL scripting * Good experience on Verification EDA Tools like simulators and waveform viewers We're doing work that matters. ## Description Job Description Be part of the Cadence DDR PHY IP Front End Design team responsible for - * Develop firmware for DDR5 PHY using microcontrollers * Developing firmware in C typically involving bare-metal programming and developing low-level APIs on Microcontrollers. * Responsible for collaborating with hardware designers and memory subsystem architects to derive training algorithms and implement them. * Responsible for collaborating with the verification team to deduce firmware-hardware co-verification plan. * Develop and Debug firmware in RTL based hardware simulations (C +Verilog simulations) * Develop and Debug on Silicon bring-up boards.