> Markdown version of [/jobs/ext/3782067-6b1di5-elect-design-and-analy-engr-5-64y-microelectronics-72700-1](https://www.wearedevelopers.com/jobs/ext/3782067-6b1di5-elect-design-and-analy-engr-5-64y-microelectronics-72700-1). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # 6B1DI5-Elect Design and Analy Engr 5 - 64Y-Microelectronics (72700-1) - **Company:** Systemart LLC - **Location:** El Segundo, CA, United States - **Contract:** Temporary to permanent - **Skills:** Systems Engineering, Code Coverage, Computer Engineering, Software Debugging, Perl (Programming Language), Ethernet, Field-Programmable Gate Array (FPGA), Python (Programming Language), Linux System Administration, Object-Oriented Software Development, PCI Express, SystemVerilog, Scripting, Application Specific Integrated Circuits, Git, Information Technology - **Published:** October 16, 2026 - **Apply:** https://www.thejobnetwork.com/job/3e4e70c5-6ba3-486f-9609-5491470025e5/bdielect-design-and-analy-engr-ymicroelectronics- ## About the Role tA Bachelor of Science degree in Engineering (specializing in Electrical, Mechanical, or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry, or equivalent non-US qualifications relevant to the job description \tProven experience in ASIC/FPGA verification processes \tFamiliarity with defining the architectural framework for ASIC/FPGA verification using SystemVerilog/UVM, including the delivery and release of production designs \tProficiency in hardware verification languages, particularly SystemVerilog and SystemVerilog Assertions \tDemonstrated experience in implementing test plans effectively \tSolid understanding of Object-Oriented Programming principles, such as Inheritance and Polymorphism \tCapability to design self-checking and reusable testbenches from the ground up \tExperience in developing Functional Coverage Models and achieving Code Coverage closure \tCapable of collaborating with design and system engineering to establish accurate and verifiable ASIC/FPGA level specifications \tFamiliarity with waveform debug tools \tRevision Control Systems: svn, cvs, git \tProficient in Linux Environments \t \tPreferred Skills: \t15+ years of related work experience or an equivalent combination of education and experience \tMaster's Degree in EE, Computer Engineering/Science, or related field, or equivalent experience \tExperience with hardware-based integration and test of ASIC/FPGA designs \tExperience with hardware emulators, especially Palladium \tExperience with high-speed Serdes interfaces (JESD204C, PCIe, Ethernet) \tProficient in scripting languages: Make, Perl, Python, etc. \tFamiliarity with space-based design techniques and radiation mitigation \tDemonstrated history of 1st pass success with ASIC designs \tEducation / Experience: \tA Bachelor of Science degree in Engineering (specializing in Electrical, Mechanical, or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry