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# Distinguished Technologist - Memory/Storage Utilization & Data Placement Architect

- **Company:** HP Inc
- **Location:** Palo Alto, CA, United States
- **Salary:** $190,000.0 - $274,000.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Computer Engineering, Computer Literacy, Software Debugging, Dynamic Random-Access Memory, Field-Programmable Gate Array (FPGA), Hardware Design, MATLAB, Performance Tuning, Schematic Capture, Enterprise Software Applications, Information Technology, Model Inference
- **Published:** October 16, 2026
- **Apply:** https://www.techcareers.com/job.asp?id=3451614360&tx=VT5954TYZ&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54

## About the Role

* Four-year or Graduate Degree in Electrical Engineering, or any other related discipline or commensurate work experience or demonstrated competence.
 * Typically has 12+ years of work experience, preferably in electrical design and tools, software packages, architecture of electronic hardware, or a related field., * Memory design
 * Computer Engineering
 * Computer Science
 * Debugging
 * Electrical Engineering
 * Electronic Engineering
 * Electronics
 * Field-Programmable Gate Array (FPGA)
 * Hardware Architecture
 * Hardware Design
 * MATLAB
 * Mechanical Engineering
 * New Product Development
 * Oscilloscope
 * Physics
 * Printed Circuit Board
 * Schematic Capture
 * Simulations
 * Systems Design, * Effective Communication
 * Results Orientation
 * Learning Agility
 * Digital Fluency
 * Customer Centricity

Impact & Scope

 * Impacts multiple functions and influences long-term strategic direction across multiple disciplines or areas of HP.

Complexity

 * Invents, develops and introduces new methods and techniques that impact multiple disciplines and work groups.

## Description

This role is responsible for defining how memory and storage are jointly utilized as a unified data hierarchy for AI workloads, optimizing data placement, movement, and persistence. This role leverages technical and business expertise to outline strategy roadmaps for the function. The role identifies future growth opportunities and addresses gaps with innovative solutions. The role collaborates closely with various stakeholders, empowers teams to achieve remarkable and consequential outcomes, and spearheads industry-leading research and development., * Architect memory/storage hierarchy (DRAM, SSD, cache layers)

 * Define policies for data placement & movement across tiers (hot vs. cold data)
 * Optimize paging, prefetching, and streaming for AI inference/training
 * Partner with SW team to ensure models are co-optimized across memory & storage for max AI performance
 * Enable efficient use of storage as memory extension (e.g., spillover, KV cache strategies)
 * Collaborate with OS/runtime teams on data orchestration
 * Evaluate emerging approaches (unified memory, memory pooling, compression)
 * Leverages recognized technical and business expertise to define long-term vision and strategy for electrical hardware design and development across multiple feature areas and divisional boundaries.
 * Develops technology roadmaps for electrical/hardware engineering team; identifies gaps and solutions for future growth.
 * Communicates strategy and technology roadmaps to executive staff, industry partners and customers.
 * Provides innovative solutions and integrates advanced technologies, theories, or techniques with a significant impact across disciplines, championing large projects for long-range goals.
 * Provides consultation, design input, and feedback for new product development and design reviews across multiple organizations and architectures.
 * Works closely with product management, engineering stakeholders from related departments and empowers the teams to deliver outstanding and impactful results.
 * Initiates industry-leading research and development, serving as a recognized lead authority internally and externally.
 * Provides mentoring and guidance to less-experienced staff members to set an example of electrical hardware design and development, innovation, and excellence.
 * Participates in and provides input on process for selection of future technical leaders.