> Markdown version of [/jobs/ext/3783618-lead-hardware-engineer](https://www.wearedevelopers.com/jobs/ext/3783618-lead-hardware-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Lead Hardware Engineer - **Company:** A2e Technologies - **Location:** Los Angeles, CA, United States - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Altium Designer, Software Debugging, Formal Verification, Field-Programmable Gate Array (FPGA), OrCAD, Schematic Capture, Signal Integrity, System on a Chip, SystemVerilog, Test Case, Test Execution Engine, Verilog, VHSIC Hardware Description Language (VHDL), Vivado - **Published:** October 16, 2026 - **Apply:** https://www.thejobnetwork.com/job/29b7bf60-09f3-4c33-9399-f15540806938/lead-hardware-engineer ## About the Role Required: US Citizen or Green Card Holder Only * Experience designing high-speed digital boards (>1GHz signals) with DDR, FPGAs, Networking, etc. * Experience with Altium schematic capture * Experience with EMC mitigation techniques and testing * Signal Integrity simulation experience. * Power Integrity simulation experience *A Plus! * Some experience with FPGA design and toolsets *A Plus! * Quality candidates will have experience with: * Bringing up circuit boards. * With technical equipment such as but not limited to power supplies, function generators, DMMs, Oscilloscopes with specialized probes. * Working in a professional laboratory setting. * With test execution, including test case generation, execution, and reporting. * Debugging and problem-solving skills to identify root causes and provide detailed analysis. * Knowledge of verification methodologies and standards relevant to the space industry. Requirements Additional Requirements: * Verilog / VHDL/SystemVerilog/Vitis, Versal * Experience with latest versions of some Xilinx / Altera devices such as: Kintex, Artix, Zynq, Cyclone V, Cyclone V SoC, Stratix, Arria * Experience with Vivado and/or latest version of Quartus * Schematic Capture with OrCAD, DxDesigner, or Altium * Use of signal integrity tools such as HyperLynx a plus