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# FPGA Engineer II

- **Company:** RTX
- **Location:** McKinney, TX, United States
- **Experience:** Experienced
- **Salary:** $68,900.0 - $131,100.0
- **Contract:** Permanent contract
- **Skills:** Code Coverage, Software Debugging, Field-Programmable Gate Array (FPGA), SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Graphics Processing Unit (GPU), Application Specific Integrated Circuits, Fpga Hardware, Software Version Control
- **Published:** October 16, 2026
- **Apply:** https://www.juju.com/job/1_raytheontech-RAYTGLOBAL01859994EXTERNALENGLOBAL

## About the Role

**Date Posted:** 2026-07-16 **Country:** United States of America **Location:** US-TX-MCKINNEY-513WD ~ 2501 W University Dr ~ WING D BLDG **Position Role Type:** Onsite **U.S. Citizen, U.S. Person, or Immigration Status Requirements:** The ability to obtain and maintain a U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance **Security Clearance Type:** DoD Clearance: Secret **Security Clearance Status:** Active and existing security clearance required after day 1 At Raytheon, the foundation of everything we do is rooted in our values and a higher calling - to help our nation and allies defend freedoms and deter aggression., requirements, verification plan, and user's guides. + Function as an individual contributor. + Clearly present your work product to leadership. + Engage in professional growth and development. **Qualifications You Must Have** + Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 2 years of prior relevant experience. + Experience to include one or more of the following: + FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding) + Experience with AMD (Xilinx), Altera and/or Microchip (Microsemi) devices and with tools such as AMD Vivado, Altera Quartus Prime Pro or Libero. + Hands-on experience with integration and debug of FPGA/ASIC in a lab environment + Experience with source code management, design reviews, and code release in a team development environment. **Qualifications We Value** + One or more advanced degrees in Electrical Engineering or a
related Science, Technology, Engineering, or Mathematics (STEM) major.
A suitable degree may be counted as 2 years of work experience. + FPGA/ASIC design experience in one or more of the following areas: + Embedded systems design using ARM, Microblaze, or NIOS processors + Gigabit serial interfaces and multi-gigabit transceivers (MGTs) + Constrained random verification in UVM using System Verilog + Experience with High Level Synthesis (HLS) + Experience with vector processors and/or GPUs + Experience with timing closure, clock domain crossing and reset domain crossing analysis, and constraint development. + Demonstrated ability to lead design efforts and/or small teams. **What We Offer** Our values drive our actions, behaviors, and performance with a vision for a safer, more connected world.

## Description

We are currently seeking an FPGA Engineer II to join our team. **This position is an onsite role, located in McKinney, TX.** **What You Will Do** + Provide full lifecycle support of production quality FPGA designs for one or more major vendors and device families including: AMD (Xilinx), Altera, and Microchip (Microsemi). + Generate FPGA designs for the following applications: gigabit serial interfaces, Radio Frequency (RF) DSP, controls, data links, embedded processing and processor interfaces. + Assist with architecture development of FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS). + Design and code in VHDL for reliability and maintainability. + Support design verification utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage. + Understand and report execution status to the planned budget and schedule using an agile framework. + Create complete documentation including