> Markdown version of [/jobs/ext/3844005-senior-firmware-engineer](https://www.wearedevelopers.com/jobs/ext/3844005-senior-firmware-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior Firmware Engineer - **Company:** Scaleflux, Inc. - **Location:** Milpitas, CA, United States - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Advanced Configuration and Power Interface (ACPI), Intelligent Platform Management Interface, Software Debugging, Device Drivers, Dynamic Random-Access Memory, Memory Management, Firmware, Joint Test Action (IEEE Standards), Linux Kernel, PCI Express, Performance Tuning, Systems Architecture, System Software, Systems Integration, Non-Uniform Memory Access, Bare Metal - **Published:** October 20, 2026 - **Apply:** https://www.juju.com/job/23_A4D702696B162FBD4FCA088DF75F7EF1 ## About the Role Strong experience in embedded systems development at SoC / bare-metal level Hands-on experience with high-speed interfaces such as PCIe Gen5+ and/or CXL Solid understanding of memory subsystems, including DDR initialization and training flows Experience with RAS (Reliability, Availability, Serviceability) features such as ECC, error handling, memory diagnostics, or fault isolation Familiarity with industry standards and protocols such as I2C, I3C, SMBus, SPD, ACPI Familiarity with low-level debugging tools and methodologies (JTAG, trace, logs, etc.) Good understanding of system architecture and hardware/software interactions., Experience with Linux kernel development or driver development (especially memory subsystem or device drivers) Knowledge of cache/memory hierarchy, NUMA, or system memory management Experience with server platform management technologies such as BMC, IPMI Knowledge of OCP standards and management protocols (MCTP, PLDM, SPDM) Familiarity with JEDEC standards related to DRAM and memory modules Strong problem-solving and debugging skills Good written and verbal communication skills Self-driven with ability to learn new technologies quickly ## Description Develop and optimize firmware for CXL Type 3 devices at SoC / bare-metal level Design and implement features related to memory initialization, training, and runtime management Work on system-level integration with host platforms (x86/AMD), including debug and performance tuning Collaborate with hardware, validation, and system software teams to bring up new silicon