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# Senior Lead Engineer, Test Development

- **Company:** Celestica (nyse, Tsx: Cls)
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Data Analysis, Automation of Tests, Network Analysis, Computer Engineering, Datasheets, Software Debugging, Logic Synthesis of Circuits, Ethernet, Firmware, Field-Programmable Gate Array (FPGA), Hardware Design, Python (Programming Language), PCI Express, Signal Integrity, Test Data, Strategies of Testing, Web Platforms, Graphics Processing Unit (GPU), High Performance Computing, Application Specific Integrated Circuits, Hardware Testing, Information Technology, Ripple (payment Protocol), Pcb Layout, Hardware Debugging, Programming Languages
- **Published:** October 22, 2026
- **Apply:** https://www.dice.com/job-detail/8f0aa43f-26b4-44d7-9a0d-db34714e47a4

## About the Role

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline; Master's degree preferred.
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Typically 8+ years of relevant hardware design, validation, signal integrity, or electrical characterization experience, with demonstrated technical leadership.
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Strong understanding of high-speed digital design and signal integrity fundamentals, including transmission lines, impedance, reflections, loss, jitter, crosstalk, equalization, and timing margins.
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Hands-on experience validating high-speed interfaces such as PCIe and Ethernet; experience with additional SerDes-based protocols is highly desirable.
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Strong understanding of power delivery and power integrity, including DC/DC regulation, PDN behavior, transient response, ripple/noise, sequencing, and high-current power rails.
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Extensive hands-on experience with high-speed laboratory instrumentation and measurement techniques.
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Ability to interpret schematics, PCB layouts, datasheets, specifications, and high-speed interface requirements.
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Strong hardware debugging and root-cause-analysis skills spanning board and system-level issues.
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Experience developing test automation using Python or similar scripting/programming languages is preferred.
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Experience with compliance test methodologies, high-speed protocol analyzers, and automated validation environments is highly desirable.
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Strong analytical, documentation, and technical communication skills.
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Demonstrated ability to lead complex technical investigations and collaborate effectively across engineering disciplines and geographically distributed teams.

Preferred Technical Experience

Experience in several of the following areas would be particularly valuable:
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PCIe Gen4/Gen5/Gen6 electrical validation and debug
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High-speed Ethernet interfaces, including 25G/50G/100G/200G/400G/800G technologies
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PAM4 and NRZ signaling
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SerDes characterization and link-margin analysis
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Eye diagram, jitter, BER, and bathtub-curve measurements
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S-parameter measurements and VNA-based channel characterization
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TDR/TDT measurements and impedance characterization
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Power integrity and PDN characterization
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High-current CPU, GPU, ASIC, FPGA, or accelerator power rails
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Oscilloscope-based power-rail noise and transient measurements
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Protocol and link-layer debugging
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Python-based laboratory automation and data analysis
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Server, networking, storage, AI/ML, or other high-performance computing hardware

Leadership Expectations

As a Senior Lead Engineer, this position is expected to serve as a technical authority for hardware test and validation, establishing robust validation methodologies and providing technical direction to engineering teams. The individual will be expected to independently tackle ambiguous and complex hardware problems, influence design decisions through measurement and analysis, mentor other engineers, and help ensure that products meet performance, quality, reliability, and customer requirements.

Typical Experience

 * 7 to 10 years of relevant experience

Typical Education

BS in Electrical Engineering, Computer Engineering, or a related technical field.

Bachelor degree or consideration of an equivalent combination of education and experience.

Educational Requirements may vary by Geography

## Description

Celestica is seeking a Senior Lead Engineer, Hardware Test and Validation to provide technical leadership in the validation and characterization of complex, high-performance hardware platforms.

This role will focus on signal integrity, high-speed interface validation, power delivery and power integrity testing, and system-level hardware validation. The successful candidate will have deep hands-on experience with laboratory instrumentation and high-speed digital technologies and will work closely with hardware design, signal integrity, power, firmware, manufacturing, and customer engineering teams.

The Senior Lead Engineer will define validation strategies, develop test methodologies, execute complex electrical characterization, troubleshoot hardware issues, and drive issues to root cause and resolution throughout the product development lifecycle.

Detailed Description
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Lead the development and execution of hardware validation and characterization plans for complex compute, networking, storage, and high-speed digital platforms.
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Define test strategies, methodologies, coverage, acceptance criteria, and validation procedures from engineering specifications and product requirements.
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Perform signal integrity (SI) validation and characterization of high-speed interfaces, including eye diagrams, jitter, timing margins, channel performance, insertion/return loss, crosstalk, and related electrical parameters.
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Validate high-speed serial interfaces and protocols such as PCI Express (PCIe), Ethernet, SerDes, and other high-speed interconnect technologies.
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Perform PCIe electrical validation across applicable generations, including transmitter/receiver characterization, link-margin analysis, compliance-oriented testing, and system-level troubleshooting.
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Perform Ethernet electrical and system-level validation across applicable speeds and interface technologies.
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Conduct power integrity and power delivery testing, including voltage regulation, ripple and noise, transient response, load regulation, power sequencing, rail stability, current consumption, and power efficiency.
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Characterize system power behavior under dynamic workloads and worst-case operating conditions.
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Use advanced laboratory equipment including high-bandwidth oscilloscopes, BERTs, vector network analyzers (VNAs), spectrum analyzers, protocol analyzers, logic analyzers, electronic loads, power analyzers, and precision DMMs.
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Develop repeatable test setups and automation to improve validation coverage, efficiency, data collection, and analysis.
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Debug complex electrical and system-level issues involving PCB design, high-speed interfaces, power delivery networks, connectors, cables, components, firmware, and system interactions.
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Perform structured root-cause analysis and work with design teams to identify and implement corrective actions.
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Review schematics, PCB layouts, design specifications, simulation results, and component documentation to identify validation requirements and potential design risks.
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Correlate laboratory measurements with SI/PI simulations and design expectations.
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Analyze test data, identify trends and margin risks, and communicate results through engineering reports, dashboards, and technical reviews.
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Provide technical leadership and mentorship to hardware validation engineers and technicians.
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Partner with cross-functional engineering teams and customers to resolve technically complex product issues.
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Support design reviews, engineering builds, qualification activities, manufacturing introduction, and product release.
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Drive continuous improvement of hardware validation processes, laboratory capabilities, automation, and engineering best practices.