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# Director, ASIC Design & Front-End Implementation

- **Company:** Hewlett-Packard Enterprise
- **Location:** Roseville, CA, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Cloud Computing, Computer Engineering, Continuous Integration, Software Debugging, Emulators, Design of User Interfaces, SystemVerilog, Verilog, Application Specific Integrated Circuits, Routing & Switching, Front End Software Development, Physical Design
- **Published:** October 22, 2026
- **Apply:** https://www.careerbuilder.com/job-details/director-asic-design-front-end-implementation-roseville-ca--1f4e6b34-1c12-47eb-bde0-c7b85b3c9b63

## About the Role

ASIC Design, User Interface Design, ASIC Design, User Interface Design, Hewlett-Packard Product Family, Analysis Skills, Cloud Computing, Silicon Bringup, Product Management, ASIC (Application Specific Integrated Circuit), * BS/MS in Electrical Engineering, Computer Engineering, or related field.

 * 15+ years of ASIC development experience, including 8+ years leading engineering teams and managers.
 * Expertise in RTL design, Verilog/SystemVerilog, microarchitecture development, synthesis, CDC, linting, timing closure, and ASIC implementation flows.
 * Proven success delivering complex ASICs from concept through production.
 * Strong cross-functional (Architecture, Verification, Physical Design, Software, Emulation, and Post-Silicon) leadership, communication, and program execution skills.

Preferred

 * Experience with networking ASICs, switching/routing architectures, packet processing, QoS, security, telemetry, and AI networking solutions.
 * Experience in silicon bring-up, validation, and post-silicon debug.
 * Background collaborating with Product Management and Marketing on roadmap planning.
 * Experience leading globally distributed engineering organizations.
 * Track record of driving methodology, automation, and productivity improvements, including AI-assisted engineering workflows.

## Description

Director, ASIC Design & Front-End ImplementationThis role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office., Lead the ASIC Design and Front-End Implementation organization responsible for delivering next-generation networking ASICs that power HPE Networking products and technology roadmaps. Drive RTL design execution, implementation readiness, design quality, and milestone delivery from architecture through tapeout, silicon bring-up, and product deployment. Partner closely with Architecture, Verification, Emulation, Software/SDK, Physical Design, Post-Silicon Engineering, Product Management, and Product Marketing to ensure successful execution and alignment with business objectives.

ASIC Design Leadership

 * Lead RTL design and microarchitecture teams developing complex networking ASICs.
 * Drive design execution from architecture through RTL completion, ensuring performance, power, area (PPA), quality, cost, and schedule targets are met.
 * Establish design methodologies, coding standards, and engineering best practices.
 * Review and approve key architectural and implementation trade-offs.

Implementation & Tapeout Readiness

 * Partner with Physical Design teams to achieve floorplanning, timing closure, power optimization, DFT integration, and tapeout readiness.
 * Ensure RTL designs are optimized for implementation, manufacturability, scalability, and production readiness.
 * Support issue resolution through implementation, silicon validation, and bring-up.

Cross-Functional Leadership

 * Collaborate across Architecture, Verification, Emulation, SDK/Software, Physical Design, Post-Silicon Engineering, Product Management, and Product Marketing.
 * Align product requirements, architecture, RTL implementation, verification, software enablement, and deployment plans.
 * Lead design reviews, milestone assessments, technical risk evaluations, and issue resolution.

Technology & Product Strategy

 * Contribute to ASIC technology strategy and product roadmaps through technical feasibility, cost, performance, and schedule analysis.
 * Collaborate with Architecture and Product teams to define future networking ASIC capabilities and competitive differentiation.
 * Represent the design organization in roadmap reviews, executive discussions, and customer engagements.

Program & People Leadership

 * Drive execution across multiple ASIC programs, managing schedules, dependencies, risks, and deliverables.
 * Lead engineering managers and senior technical contributors while recruiting, developing, and retaining top talent.
 * Foster a culture of accountability, technical excellence, innovation, and continuous learning.

Methodology & Productivity

 * Improve design quality, engineering productivity, and execution efficiency through automation, CI/CD, and modern development practices.
 * Champion AI-assisted engineering tools and methodology enhancements that improve predictability, quality, and time-to-market.