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# VP Hardware Engineering

- **Company:** Blue Signal
- **Location:** New York, NY, United States (Remote available)
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Computer Engineering, Data Centers, Logic Synthesis of Circuits, Field-Programmable Gate Array (FPGA), PCI Express, SystemVerilog, VHSIC Hardware Description Language (VHDL), Application Specific Integrated Circuits, Large Language Models, Physical Design, Model Inference
- **Published:** October 22, 2026
- **Apply:** https://www.nettemps.com/us/en/WCA2561C832BCB25145.ntap

## About the Role

* 10+ years designing high-performance custom silicon for compute-intensive workloads; at least one successful tape-out in a leadership role.
 * Mastery of SoC/ASIC architecture, RTL (SystemVerilog/VHDL), verification methodology, physical design, and DFT.
 * Deep familiarity with memory hierarchies, high-bandwidth interconnects (PCIe, CXL, or similar), and accelerator-class power-performance trade-offs.
 * Prior experience converting FPGA prototypes into production silicon is highly valued.
 * Proven ability to recruit, develop, and lead multidisciplinary engineering teams in fast-moving startup or new-business environments.
 * Excellent communication and executive-level storytelling skills; comfortable presenting complex trade-offs to non-technical stakeholders.

## Description

* Define the architectural vision for a data-center-class AI inference accelerator and translate it into a scalable ASIC implementation.
 * Chart the course from proof-of-concept FPGAs toward a commercially manufactured AI accelerator ASIC within aggressive time-to-market goals.
 * Own the full silicon lifecycle: RTL design, verification, physical design, tape-out, and post-silicon validation.
 * Build, mentor, and inspire a high-performance hardware engineering organization, spanning digital design, verification, physical implementation, packaging, and systems.
 * Partner closely with applied-AI and software teams on hardware-software co-design that maximizes tokens-per-second and minimizes latency for LLM workloads.
 * Establish relationships with foundries, EDA vendors, and manufacturing partners; drive technical diligence and risk reduction.
 * Represent hardware engineering in executive planning, customer briefings, and investor discussions.

What Success Looks Like

 * First-silicon win - Tape-out of the company's inaugural inference ASIC on schedule and on budget, meeting PPA targets.
 * Team built - A cohesive, mission-driven silicon organization with clear ownership, processes, and recruiting pipeline.
 * Customer impact - Demonstrated order-of-magnitude throughput improvements for early design-partner deployments.
 * Strategic voice - Tangible influence on company strategy, product roadmap, and go-to-market positioning.