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# Senior ASIC Research Engineer - Front-end Digital Design

- **Company:** University of South Carolina
- **Location:** Arlington, VA, United States
- **Experience:** Expert
- **Salary:** $140,000.0 - $170,000.0
- **Contract:** Permanent contract
- **Skills:** Computer Engineering, Microarchitecture, Linux, Digital Arts, Logic Synthesis of Circuits, Microprocessors, Electronic Design Automation, Field-Programmable Gate Array (FPGA), Hardware Design, Machine Learning, Tensorflow, Signal Processing, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Scripting, Application Specific Integrated Circuits, Pytorch, Deep Learning, HuggingFace, Integration Frameworks, Front End Software Development, Software Version Control
- **Published:** October 22, 2026
- **Apply:** https://usc.wd5.myworkdayjobs.com/ExternalUSCCareers/job/Arlington-VA/Senior-ASIC-Research-Engineer---Front-end-Digital-Design_REQ20182058

## About the Role

* Ability to handle Controlled Unclassified Information (CUI). Per U.S. government regulations, eligibility to handle CUI requires U.S. Citizenship or Permanent Residency.
 * Degree in Computer Engineering, Electrical Engineering, or related field
 * Master's degree with >5 years of experience
 * Demonstrated excellence creating digital designs with Verilog, System Verilog, or VHDL RTL
 * Solid understanding of computer architecture and microarchitecture
 * Demonstrated skills with EDA tools (logic synthesis, timing), scripting, revision control, * Familiarity with digital design verification
 * Familiarity with performance modeling
 * Familiarity with agile hardware design methodologies
 * Experience with AI-assisted workflows
 * Experience using FPGAs
 * Effective at verbal communication and giving clear explanations

The annual base salary range for this position is $140,000 to $170,000. When extending an offer of employment, the University of Southern California considers factors such as (but not limited to) the scope and responsibilities of the position, the candidate's work experience, education/training, key skills, internal peer equity, federal, state, and local laws, contractual stipulations, grant funding, as well as external market and organizational considerations., Minimum Education: Bachelors, combined experience/education as substitute for minimum education
Minimum Experience: 8 years
Minimum Skills: Experience with Linux. Excellent written and oral communication skills.
Preferred Education: Master's degree
Preferred Experience: 10 years
Preferred Skills: Proven leadership ability. Experience with artificial intelligence, very large-scale integration design, machine learning, deep learning (e.g., TensorFlow, PyTorch, HuggingFace), and Dockerization.

## Description

ISI's Computational Systems & Technology Division has an opening in Arlington, VA for a Senior ASIC Research Engineer - Front-end Digital Design, to design advanced ASIC prototypes addressing problems of national importance. The Engineer will work with a cutting-edge team to design and verify register-transfer level (RTL) models of CPUs, memories, and accelerators for applications such as communications, signal processing, and security. The Engineer will have opportunities to collaborate with ISI's MOSIS 2.0 service, integrate third-party IP cores, and gain experience working with top research sponsors such as DARPA, IARPA, and the CHIPS Act. The position provides a collaborative, flexible university setting with rich learning and growth opportunities. The Engineer will gain experience in a fast-moving research setting and work toward a better and more secure future.