> Markdown version of [/jobs/ext/3874738-senior-fpga-prototyping-engineer](https://www.wearedevelopers.com/jobs/ext/3874738-senior-fpga-prototyping-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior FPGA Prototyping Engineer - **Company:** K2 Space - **Location:** Los Angeles, CA, United States - **Experience:** Expert - **Salary:** $120,000.0 - $225,000.0 - **Contract:** Permanent contract - **Skills:** Board Bringup, Automation of Tests, Computer Engineering, Software Debugging, Digital Technology, Ethernet, Firmware, Field-Programmable Gate Array (FPGA), Joint Test Action (IEEE Standards), Python (Programming Language), Real-Time Operating Systems, Regression Testing, Reduced Instruction Set Computing, System Testing, SystemVerilog, Systems Integration, Universal Asynchronous Receiver/Transmitter, Verilog, Scripting, Application Specific Integrated Circuits, Fpga Hardware, Hardware Testing, Bare Metal, Hardware Debugging - **Published:** October 22, 2026 - **Apply:** https://www.thejobnetwork.com/job/b303f866-d273-4414-a42b-dec82999edcd/senior-fpga-prototyping-engineer ## About the Role With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger - helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply., * BS or MS in Electrical Engineering, Computer Engineering, or related field. * 5+ years of FPGA development experience using Verilog/SystemVerilog and AMD/Xilinx FPGA tools. * Strong understanding of ASIC development and digital system architecture. * Experience with FPGA prototyping for ASIC development. * Experience with firmware/software enablement and hardware bring-up. * Strong hardware debugging skills using JTAG, oscilloscopes, logic analyzers, and protocol analyzers. * Proficiency with Python and scripting for automation and test infrastructure. Nice to Have * Experience with networking, communications, or satellite systems. * Experience with embedded processors (ARM or RISC-V). * Experience working with hard real-time embedded systems (bare-metal or RTOS). * Experience validating high-speed digital interfaces, including Ethernet and SerDes protocols, SPI, and UART. * Experience with silicon bring-up using JTAG, logic analyzers, and oscilloscopes. ## Description We are seeking a Senior FPGA & Silicon Bring-up Engineer to accelerate the development of next-generation communications ASICs. You will own FPGA prototyping, firmware enablement, first-silicon bring-up, and hardware validation, serving as the bridge between ASIC design, firmware, software, and system integration. This role spans the entire silicon lifecycle from pre-silicon FPGA platforms that enable early hardware/software integration to post-silicon debug, interface validation, and automated test infrastructure., * Develop FPGA-based prototypes to enable early ASIC integration, firmware development, and system validation. * Build hardware platforms that allow software and firmware teams to develop before first silicon. * Support first-silicon bring-up, debug, and functional validation. * Develop automated validation infrastructure for silicon characterization and regression testing. * Configure and validate digital interfaces including high-speed Ethernet SerDes, SPI, UART, GPIO, and other peripheral interfaces. * Develop FPGA-based traffic generators, protocol checkers, and test applications for interface validation. * Debug issues spanning RTL, firmware, software, FPGA prototypes, and silicon using simulation and laboratory instrumentation. * Collaborate closely with ASIC Design, Verification, Firmware, Software, Systems, and DFT teams to accelerate product development.