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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Staff Engineer, Test Development - **Company:** Celestica's Platform Solutions - **Location:** San Jose, CA, United States - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Data Analysis, Automation of Tests, Computer Programming, Computer Engineering, Software Debugging, Logic Synthesis of Circuits, Ethernet, Firmware, Field-Programmable Gate Array (FPGA), Hardware Design, Python (Programming Language), PCI Express, Signal Integrity, Strategies of Testing, Graphics Processing Unit (GPU), High Performance Computing, Application Specific Integrated Circuits, Hardware Testing, Data Analytics, Ripple (payment Protocol), Pcb Layout - **Published:** October 23, 2026 - **Apply:** https://www.dice.com/job-detail/432fda58-733f-4fee-893a-8812d317acae ## About the Role Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline; Master's degree preferred. * Typically 12+ years of progressive experience in hardware design, hardware validation, signal integrity, power integrity, electrical characterization, or related disciplines. * Demonstrated experience operating as a senior technical leader on complex hardware development programs. * Deep understanding of high-speed digital design and signal integrity, including transmission lines, impedance, reflections, insertion and return loss, crosstalk, jitter, equalization, BER, and timing margin. * Strong hands-on expertise with PCIe and Ethernet electrical validation and system-level troubleshooting. * Strong knowledge of high-speed SerDes architectures, NRZ and PAM4 signaling, and channel characterization. * Deep understanding of power delivery and power integrity, including voltage regulation, PDN behavior, transient response, ripple/noise, sequencing, and high-current power rails. * Extensive experience using high-bandwidth oscilloscopes, BERTs, VNAs, TDR/TDT equipment, spectrum analyzers, protocol analyzers, electronic loads, power analyzers, and other advanced laboratory instrumentation. * Strong ability to interpret schematics, PCB layouts, design specifications, simulation results, standards, and component documentation. * Demonstrated ability to lead complex root-cause investigations spanning multiple engineering disciplines. * Experience with Python or similar programming/scripting languages for test automation and data analysis. * Strong written and verbal communication skills with the ability to communicate complex technical subjects to engineering teams, senior leadership, customers, and partners. * 7 to 10 years of related experience; Experience in similar job roles Typical Education Bachelor degree or consideration of an equivalent combination of education and experience. Educational Requirements may vary by Geography ## Description Celestica is seeking a Staff Engineer, Hardware Test and Validation to provide senior technical and engineering leadership for the validation and characterization of complex, high-performance hardware platforms. As a Staff Engineer, this individual will serve as a technical authority and leader across hardware validation, signal integrity, power integrity, and high-speed interface technologies. The role will define validation strategies, establish engineering methodologies and best practices, guide complex technical investigations, and influence product architecture and design decisions across multiple programs. The successful candidate will combine deep hands-on expertise in signal integrity, power delivery and power integrity, PCI Express (PCIe), Ethernet, and high-speed SerDes technologies with the ability to lead and mentor engineering teams, influence cross-functional organizations, and engage technically with customers and technology partners. This position requires an engineer who can move comfortably between detailed laboratory measurements, system-level architecture, technical leadership, and strategic engineering decisions. Detailed Description Technical Leadership and Strategy * Serve as the primary technical authority for hardware validation, Signal Integrity (SI), and Power Integrity (PI). * Define global validation strategies, establish engineering standards, and influence early product architecture to mitigate system-level risks. * Lead schematic/PCB reviews and drive improvements in lab infrastructure and simulation-to-measurement correlation. Signal Integrity and High-Speed Validation * Direct SI characterization for advanced interconnects, including PCIe Gen5/Gen6 and 100G-800G Ethernet. * Execute advanced testing (eye diagrams, jitter, channel loss) for NRZ and PAM4 signaling using VNAs, TDRs, and oscilloscopes. Power Integrity and Power Validation * Lead Power Delivery Network (PDN) validation for high-performance workloads (CPU, GPU, ASIC). * Characterize transient response, ripple, and rail stability, evaluating complex interactions between PI, SI, and thermal behavior. Hardware Debug and Root-Cause Analysis * Drive structured root-cause investigations for complex hardware, firmware, and system-level failures. * Partner with cross-functional and supplier teams to isolate faults and resolve critical customer escalations. Test Automation and Engineering Capability * Develop scalable, Python-based test automation frameworks for instrumentation control and data acquisition. * Standardize validation infrastructure to improve engineering productivity and accelerate data-driven decisions. Engineering Leadership and Organizational Influence * Mentor senior engineers, guide cross-functional teams through product milestones, and align conflicting technical priorities. * Build strategic relationships with vendors and partners, define future validation roadmaps, and champion a culture of engineering rigor. Knowledge/Skills/Competencies Preferred Technical Experience Experience in several of the following areas is highly desirable: * PCIe Gen5/Gen6 electrical validation and compliance * 100G/200G/400G/800G Ethernet * Advanced SerDes characterization * PAM4 and NRZ signaling * Eye diagram, jitter, BER, bathtub-curve, and link-margin analysis * S-parameter and VNA-based channel characterization * TDR/TDT and impedance characterization * High-speed PCB and connector characterization * Power integrity and PDN simulation/measurement correlation * High-current CPU, GPU, ASIC, FPGA, and accelerator power delivery * Protocol and link-layer debugging * Python-based laboratory automation and data analytics * Server, networking, storage, AI/ML, or high-performance computing platforms * Development and qualification of complex multi-board systems Staff-Level Leadership Expectations The Staff Engineer is expected to operate beyond the scope of an individual product or validation activity and provide technical leadership across programs, engineering teams, and technology areas. Success in this role requires the ability to: * Set technical direction rather than simply execute an established validation plan. * Recognize cross-program technical risks and establish scalable solutions. * Make and influence architecture-level engineering decisions based on measurement, analysis, and sound engineering judgment. * Lead complex technical initiatives involving multiple engineering disciplines and organizations. * Serve as an escalation point for the most difficult SI, PI, high-speed interface, and system-level hardware problems. * Develop the technical capabilities of other engineers through mentoring and hands-on leadership. * Communicate effectively with customers and senior technical stakeholders. * Translate emerging technologies and customer requirements into validation capabilities and engineering roadmaps. * Balance immediate product execution with longer-term improvements in engineering methodology, automation, laboratory capability, and organizational technical expertise. The Staff Engineer will remain technically hands-on while providing broader leadership and influence, serving as a key bridge between detailed engineering execution, product architecture, customers, and the wider engineering organization. Physical Demands * Duties of this position are performed in a normal office environment. * Duties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data. * Repetitive manual movements (e.g., data entry, using a computer mouse, using a calculator, etc.) are frequently required. * Occasional travel may be required.