> Markdown version of [/jobs/ext/3889652-memory-package-integration-architect](https://www.wearedevelopers.com/jobs/ext/3889652-memory-package-integration-architect). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Memory Package Integration Architect - **Company:** Micron Technology, Inc. - **Location:** San Jose, CA, United States - **Experience:** Expert - **Salary:** $143,000 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Electronic Design Automation, Systems Architecture, Large Language Models, Reliability of Systems, Ansys - **Published:** October 23, 2026 - **Apply:** https://www.sanjosejobsite.com/job.asp?id=3466352021&tx=FP8178FFQ&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54 ## About the Role * Master's degree or equivalent practical experience in EE, CE, CS, or related field * 6+ years of Extensive hands-on experience in memory systems package design, signaling, IO design, PDN design * Deep understanding of memory timing, signaling, power, package process technology * working knowledge of EDA tools for design, analysis and simulation of electronic packaging, including but not limited to Cadence, Siemens and Ansys tools * Experience applying AI or LLMs for engineering efficiency, * Master's degree or PhD in a related technical field * Recognized technical leadership across multiple products * Experience in Signal and Power integrity analysis and mechanical and reliability analysis, thermal analysis * Expertise in memory systems architecture ## Description * Define next-generation package pathfinding and system architectures optimizing for speed performance, system bandwidth, power, capacity, thermal, mechanical and electrical performance. * Lead cross-stack co-optimization across silicon, package, board, and system with package centric solutions approach * Drive long-term memory technology packaging strategy and influence industry standards * Work closely with silicon, and system design teams and customers for next generation and long term disruptive solutions to boost speed performance for edge-AI and datacenter memory products * Serve as a technical interface to internal partners, customers, BUs, senior leaders. * Develop AI based multi-physics solutions for efficiency gains