> Markdown version of [/jobs/ext/3894865-sr-design-readiness-engineer](https://www.wearedevelopers.com/jobs/ext/3894865-sr-design-readiness-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md).

---

# Sr Design Readiness Engineer

- **Company:** Micron Technology, Inc.
- **Location:** Boise, ID, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Data Analysis, Code Coverage, Software Documentation, Computer Engineering, Software Debugging, Dynamic Random-Access Memory, Failure Mode Effects Analysis, Knowledge Management, Agentic-AI
- **Published:** October 23, 2026
- **Apply:** https://www.techcareers.com/job.asp?id=3466676402&tx=CT2826TYT&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54

## About the Role

* Advanced degree in Electrical Engineering, Computer Engineering, Semiconductor Engineering, Applied Physics, Materials Science, or a related technical field, or equivalent industry experience
 * Significant experience in semiconductor design, DRAM or memory technology, silicon validation, product engineering, device characterization, circuit debug, reliability, test development, or new product introduction
 * Proven ability to analyze sophisticated technical problems using silicon data, validation results, circuit behavior, failure analysis, and statistical methods
 * Experience leading technical investigations, root-cause analysis, and cross-functional resolution efforts
 * Strong communication and collaboration skills with the ability to influence technical decisions across engineering organizations, * PhD or MS in a relevant engineering or scientific field
 * Experience mentoring engineers, leading technical workstreams, or establishing engineering protocols
 * Expertise in silicon debug, screen development, production test coverage, margin characterization, or product quality improvement
 * AI proficiency with experience using approved AI-enabled tools for engineering analysis, user documentation, workflow automation, or knowledge management
 * Experience working with Agentic AI tools to assist with design and verification

Team Culture and Growth Opportunity

Our team focuses on technical excellence, disciplined execution, continuous learning, inclusive collaboration, and AI-enabled ways of working. We are looking for experienced engineers who want to apply their depth to meaningful product challenges while continuing to expand their influence across DRAM design readiness, validation, silicon learning, manufacturing readiness, and the future of engineering productivity.

This role is well suited for candidates who have built strong technical depth through industry experience, graduate research, or a combination of both, and who are motivated to use that expertise to shape product readiness outcomes across advanced memory programs.

## Description

* Lead design readiness activities for new DRAM products, including risk assessments, DFMEA development, validation planning, and readiness reviews
 * Partner with cross-functional teams to identify product risks, define validation coverage, and prioritize debug activities
 * Drive root-cause investigations of silicon findings through data analysis, experiment planning, evidence review, and corrective action development
 * Influence product readiness decisions by connecting design intent, validation results, silicon behavior, manufacturing constraints, and customer quality expectations
 * Mentor engineers and help improve technical practices, readiness processes, and organizational learning across DRAM programs