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# IC Implementation, Sr Principal AE

- **Company:** Cadence Design Systems, Inc.
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Salary:** $148,400.0 - $275,600.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Computer Engineering, Software Debugging, Perl (Programming Language), Python (Programming Language), Static Timing Analysis, Tcl (Programming Language), Scripting, Agentic-AI, Physical Design, Cts+
- **Published:** October 26, 2026
- **Apply:** https://cadence.wd1.myworkdayjobs.com/External_Careers/job/SAN-JOSE/IC-Implementation--Sr-Principal-AE_R56907

## About the Role

The Senior Principal Application Engineer will be a trusted technical leader, driving complex pre-sales and post-sales engagements for Cadence Digital IC products at advanced nodes. This role demands a proven ability to solve the toughest design challenges and deliver innovative solutions that ensure customer success., * 12+ years of hands-on experience in physical implementation and signoff at 7nm and below, with multiple successful tapeouts.

 * Demonstrated expertise in digital synthesis, place-and-route, static timing analysis, AI in EDA, and achieving timing and power goals for advanced node designs.
 * Strong debugging skills with the ability to isolate and resolve critical design issues efficiently.
 * Proficiency in scripting for automation and flow customization.
 * Bachelor's or Master's in Electrical/Computer Engineering.

Exceptional communication and leadership skills, with a track record of building

## Description

* Lead technical strategy and execution for critical customer design projects, influencing design methodologies and implementation flows at advanced nodes (3nm and below)
 * Partner with sales teams to grow Cadence business by showcasing Cadence's leadership in digital implementation.
 * Serve as a primary consultant for advanced-node design synthesis & implementation, Agentic-AI and signoff, leveraging deep expertise in synthesis, place & route, CTS, floor planning, timing signoff, design convergence with timing closure, and power optimization as key aspects.
 * Develop and deploy custom solutions using scripting languages (TCL, PERL, Python) to address unique customer requirements.
 * Mentor and guide junior engineers, fostering technical excellence and knowledge sharing across teams.