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# HW Security Engineer

- **Company:** Rambus
- **Location:** Rotterdam, Netherlands (Remote available)
- **Experience:** Experienced
- **Contract:** Permanent contract
- **Skills:** Unix, Computer Engineering, Linux, Logic Synthesis of Circuits, Perl (Programming Language), Formal Verification, Hardware Design, Python (Programming Language), Shell Script, Static Timing Analysis, SystemVerilog, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Application Specific Integrated Circuits, Software Verification, Front End Software Development, Physical Design
- **Published:** October 27, 2026
- **Apply:** https://www.adzuna.nl/details/5829197744

## About the Role

* MS/PhD degree in electrical or computer engineering required.

 * 4 plus years working on secure hardware design, a PhD degree may substitute the work experience requirement

 * Demonstrated proficiency in Verilog/(or VHDL) and digital design.

 * Familiarity with front-end ASIC design flows, including design, synthesis, timing analysis, logical equivalence checking, and linting/rule checking

 * Expertise in some or all of the following areas is beneficial:

 * Cryptographic algorithms and side-channel attacks

 * Experience with back-end flows, especially place-and-route

 * DFT, especially testing and characterization and/or Logic BIST methodologies.

 * Hardware development experience in UNIX/Linux environments, including supporting tasks such as shell scripting and basic Perl scripts.

 * Tools/Technologies

 * Verilog (or VHDL), SystemVerilog, Perl

 * Shell scripting, Python, Tcl

 * Xilinx Vivado,

 * Unix, Linux

 * Front-end ASIC design tools, such as

 * Synopsys Design Compiler

 * Cadence Genus

 * Synopsys Spyglass

 * Cadence Conformal(-LP)

 * ASIC simulation/verification tools, such as

 * Cadence Xcelium

 * Synopsys Verdi

 * Mentor Questa Formal Verification

## Description

As an ASIC Security Engineer, you'll play a pivotal role in architecting and developing security IPs including post-quantum crypto accelerators, random number generators and various other crypto cores. In this full-time role, you'll report directly to our Security Engineering Manager. Silicon IP team is dedicated to design with Rambus's quality standard and awareness of safety and security while maintaining the high configurability of the product.

Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.

 * Research, invent and patent/publish new techniques in the field of security.

 * Work closely with the system architects to contribute to the architecture and design of various crypto cores.

 * Cooperate with the software team, product managers, security experts and other stakeholders to support the current and next generation security products and their certification effort.

 * Drive design improvements for continuous product quality and safety.

 * Assure the delivered product and documentation adheres to Rambus quality and safety standards.