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# Senior Memory System Architect

- **Company:** NVIDIA Corporation
- **Location:** Durham, NC, United States
- **Experience:** Expert
- **Salary:** $152,000.0 - $241,500.0
- **Contract:** Permanent contract
- **Skills:** C++ (Programming Language), Microarchitecture, Software Debugging, Digital Technology, Perl (Programming Language), Python (Programming Language), Software Engineering, Systems Architecture, Verilog, Virtual Memory, Deep Learning, Caching, Vlsi Design, Network Server, Programming Languages
- **Published:** October 27, 2026
- **Apply:** https://www.careerbuilder.com/job-details/senior-memory-system-architect-durham-nc--0893f262-e2dc-4ad4-b4ad-07433057c6a4

## About the Role

System Architecture, Gaming, System Architecture, Memory Hardware, Computer Servers, Robotics, Candidate Sourcing, Deep Learning, Simulation, Performance Modeling, * M.S. or Ph.D. in CS, CE, or EE or equivalent experience

 * 3+ years experience in SoC or memory system architecture and performance
 * Deep understanding of memory subsystems - caches and coherence protocols, DDR and memory controller architecture, on-chip interconnects, address translation
 * Strong communication and interpersonal skills along with the ability to work in a dynamic, product oriented, distributed team.
 * Exposure/coursework related to Digital systems and VLSI design, Computer Architecture, C/C++ programming languages.
 * Software development experience with C++, python and/or perl. Verilog or SV/UVM are a plus.

Ways To Stand Out from the Crowd

 * Significant experience with performance modeling or performance verification.
 * Experience debugging and solving complex performance issues.

## Description

* Driving development of architecture and micro-architecture to improve the state-of-the-art in memory systems optimizing along the axes of performance, power efficiency, complexity, area, effort, and schedule.
 * Performance modeling and simulation of features to improve memory system performance and efficiency.
 * Implementing and maintaining detailed and high-level performance models.
 * Analyzing benchmarks, application workloads, and performance simulation results to identify tradeoffs in areas of micro-architectural optimizations.
 * Debugging performance and functional issues with high-level models, RTL simulation, and silicon.