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# Senior Software R&D Engineer, ECO Route - VLSI EDA

- **Company:** NVIDIA Ltd.
- **Location:** Monte Sereno, CA, United States
- **Experience:** Expert
- **Salary:** $168,000.0 - $264,500.0
- **Contract:** Permanent contract
- **Skills:** Algorithm Design, Very-Large-Scale Integration, C++ (Programming Language), Data Structures, Logic Synthesis of Circuits, Microprocessors, Hardware Design, Machine Learning, Routing, Performance Tuning, Software Deployment, Reinforcement Learning, Graphics Processing Unit (GPU), Graph Neural Networks, Large Language Models, Parallel Computation, Hardware Acceleration, Physical Design
- **Published:** October 27, 2026
- **Apply:** https://www.careerbuilder.com/job-details/senior-software-r-d-engineer-eco-route-vlsi-eda-austin-tx--2806e4f8-547b-48c4-925d-467cb3a80d2d

## About the Role

Research & Development (R&D), VLSI, Algorithms, Parallel Computing, Machine Learning, C++ Programming Language, Hardware Design, eCos, Logic Design, Research & Development (R&D), * MS, PhD, or equivalent experience, with 5+ years of relevant experience.

 * Strong expertise in C++, high-performance software architecture and algorithm development, including complexity, data structures, and memory efficiency.
 * Deep understanding of detailed routing, including advanced design rules, pin access, route optimization, and DRC-aware implementation.
 * Understanding of areas often impacted and co-optimized with ECOs, including clock distribution, DFT, and power delivery.
 * Authorization to work on export controlled data arising in CPUs, GPUs, LPUs, and communication networks.

Ways to stand out from the crowd:

 * Familiarity with logic and physical co-optimization principles, including logic restructuring, technology mapping, and using SAT solvers.
 * Experience with related physical-design areas such as placement, legalization, and IR drop reduction.
 * Experience applying LLMs, reinforcement learning, GNNs, or other machine-learning techniques to physical design, combinatorial optimization, or algorithm-performance tuning.

Are you passionate about tackling innovative algorithms that enable the fastest, most efficient AI hardware? We have the scale, compute resources, and direct collaboration with hardware teams that make that possible!

## Description

* Develop incremental physical-design technology that can rapidly implement high-performance logic changes with DRC and parasitic awareness, including for both all-layer and metal-only ECOs.
 * Invent improved detailed-routing algorithms for the intricate mix of discrete and continuous optimization problems arising from DRC constraints in the latest manufacturing processes.
 * Help craft cross-domain optimization tools that simultaneously consider logic, timing, clocks, testability, power distribution, placement, along with routing and DRCs to push the frontier of computing performance.
 * Own problems end-to-end-from algorithm invention through implementation, validation, and production deployment.