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# Software Engineer, AI for Chip Design

- **Company:** OpenAI Inc.
- **Location:** San Francisco, CA, United States
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Software Debugging, Distributed Systems, Electronic Design Automation, Formal Verification, Hardware Design, Python (Programming Language), OpenAI, Software Engineering, SystemVerilog, Verilog, Reinforcement Learning, Physical Design
- **Published:** October 29, 2026
- **Apply:** https://www.careerbuilder.com/job-details/software-engineer-ai-for-chip-design-san-francisco-ca--2835000f-de67-47a9-bcdd-f4c6ea389558

## About the Role

Software Engineering, Artificial Intelligence (AI), Semiconductors, Hardware Design, Artificial Intelligence (AI), Performance Metrics, Reinforcement Learning, Software Engineering, Machine Tool, Technical Recruiting, * Have strong software engineering fundamentals, with experience designing, implementing, and debugging reliable systems.

 * Can work across a stack, investigate unfamiliar failures, and make practical tradeoffs between speed, correctness, and maintainability.
 * Have independently delivered substantial software projects and can explain your technical decisions and their impact.
 * Are comfortable working with researchers on evolving requirements and turning open-ended problems into working software.
 * Are interested in learning how reinforcement learning and chip-design tools fit together.
 * Care about developing safe, beneficial AI.

Nice to have:

 * Experience with research infrastructure, distributed systems, experiment orchestration, or ML tooling.
 * Familiarity with reinforcement learning, model evaluations, or training workflows.
 * Experience with Python, containerized tools, and reproducible development environments.
 * Experience with RTL, Verilog/SystemVerilog, EDA tools, formal verification, or chip-design automation.

## Description

We're hiring a Software Engineer to build the research infrastructure and tooling that help OpenAI models design silicon. You'll turn chip-design workflows into reliable environments for reinforcement learning and evaluation, and make it easier for researchers to run experiments and iterate on new ideas.

You'll move between software engineering, tool integration, and open research problems. We value strong coding fundamentals, clear technical judgment, and independent execution. Prior chip-design experience is helpful, but you can learn the domain alongside the team's hardware specialists.

In this role, you will:

 * Build and maintain infrastructure for reinforcement learning environments, evaluations, and long-running experiments.
 * Integrate electronic design automation (EDA) tools into workflows for RTL generation, verification, and physical design optimization.
 * Improve experiment reliability, reproducibility, observability, and performance; debug failures across tools, services, and infrastructure.
 * Develop tooling and model harnesses that let researchers test ideas quickly and measure correctness and power, performance, and area (PPA).
 * Collaborate with researchers and engineers to turn successful experiments into reusable systems and training workflows.
 * Own ambiguous projects end to end, communicate progress, and use results to guide the next iteration.