> Markdown version of [/jobs/ext/4010523-sr-staff-hardware-design-engineer-rack-scale-team-lead-ai-data-center](https://www.wearedevelopers.com/jobs/ext/4010523-sr-staff-hardware-design-engineer-rack-scale-team-lead-ai-data-center). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Sr. Staff Hardware Design Engineer, Rack Scale - Team Lead (AI Data Center) - **Company:** Qualcomm - **Location:** San Diego, CA, United States (Remote available) - **Experience:** Expert - **Salary:** $169,800.0 - $254,600.0 - **Contract:** Permanent contract - **Skills:** Agile Methodology, Artificial Intelligence, Confluence, JIRA, BIOS, Computer Engineering, Data Centers, Software Debugging, Firmware, Hardware Design, Microsoft Office, PCI Express, Microsoft SharePoint, Data Logging, Information Technology, Model Inference - **Published:** October 29, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=75865b4b42b690f0 ## About the Role * Master's degree in computer science/engineering, electrical engineering, or a related field. * 8+ years of experience in systems or hardware engineering, hardware project lifecycle management, and technical product/program management. * Experience with rack level systems and components. * Proven experience collaborating with technical teams to develop systems, solutions, and products. * Experience managing technical programs across cross-functional teams, establishing processes, and coordinating release schedules, and working in large, matrixed organizations. * Demonstrated proficiency with Microsoft Office applications, SharePoint, JIRA/Confluence, and other defect-tracking tools. * Persuasive communication, organizational, coordination, multi-tasking, and documentation skills. * Experience with server technologies, including board design, SIPI, thermal and mechanical aspects, BIOS, BMC, and networking. * Familiarity with Agile methods and practices. * Experience working with CMs, OEMs, ODMs, and suppliers in product development. * Strong cross-functional communication skills, with experience managing complex program lifecycles, building sustainable processes, and coordinating release schedules., * Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience., Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ## Description The Qualcomm Data Center AI System Hardware and Validation Engineering team develops rack-level AI inference solutions for next-generation, liquid-cooled data centers. As the organization continues to grow, the team is seeking experienced Technical Leads to help deliver the next wave of innovative AI products. As a System Hardware and Validation Technical Lead, you will partner with SoC, software/firmware, rack-level system design, and manufacturing teams. Collaborating closely with peer leads, you will ensure program activities are well planned, tracked, and executed against phase-gate milestones from concept through production. * Lead execution for next-generation Qualcomm rack-scale designs within a matrixed organization spanning multiple teams and global sites. * Define and manage requirements, scope, schedules, and deliverables in alignment with engineering teams, partners, and stakeholders. * Own rack-level integration plans across compute nodes/accelerators, PCIe fabrics, networking, storage, power delivery, cooling, and rack management/telemetry. * Drive firmware/software/hardware co-design execution, aligning BIOS/BMC/Redfish/telemetry requirements with hardware schedules and validation gates. * Lead cross-functional design reviews and readiness reviews (architecture, schematic/layout, SI/PI, thermal, mechanical, firmware, manufacturing), and close actions to schedule. * Coordinate platform-level debug and instrumentation (telemetry, logging, health monitoring) to accelerate failure analysis and improve observability. * Establish and run triage mechanisms (issue intake, prioritization, defect metrics) and drive issues to root cause, corrective action, and verified closure. * Define and track program-level KPIs (schedule health, build quality, defect trends, coverage, yield, reliability) and publish executive dashboards and weekly program reviews. * Identify program risks, drive mitigation plans, and manage scope changes while proactively communicating status and decisions to stakeholders.