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# SoC Product Architect, Memory Ecosystem

- **Company:** NVIDIA Ltd.
- **Location:** Santa Clara, CA, United States
- **Experience:** Expert
- **Salary:** $320,000.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Computer Engineering, Computer Graphics, Data Centers, Dynamic Random-Access Memory, Flash Memory, Non-Volatile Memory, Signal Integrity, System on a Chip, Graphics Processing Unit (GPU), Computer Network Operations, Low Latency, Data Analytics
- **Published:** October 29, 2026
- **Apply:** https://www.careerbuilder.com/job-details/soc-product-architect-memory-ecosystem-santa-clara-ca--e8c9a48f-4586-42fd-aca9-6ffc36c96e73

## About the Role

System-on-a-Chip (SoC), Memory Hardware, Ecosystems, DRAM, Memory Hardware, Network Operations Center, Ecosystems, Artificial Intelligence (AI), System-on-a-Chip (SoC), Computer Graphics, * MS in Electrical Engineering, Computer Engineering, Physics, or related field, or equivalent experience.

 * 18+ years of experience in DRAM / memory subsystem architecture, SoC or memory controller design, or closely related roles in semiconductor or system companies.Deep understanding of modern DRAM technologies (e.g., DDR, LPDDR, GDDR, HBM) and non-volatile memories (e.g., NAND flash, managed NAND/SSD), including key tradeoffs in bandwidth, latency, power, capacity, packaging, and reliability.
 * Proven experience working directly with memory vendors on product definition, bring-up, or co-development, and familiarity with how large-scale customers influence vendor roadmaps.
 * Solid background in SoC and system memory subsystems, including memory controllers, PHYs, signal integrity, power delivery, and how memory choices impact overall SoC and platform performance and power.
 * Demonstrated ability to perform competitive analysis, including interpreting teardown data, benchmarking memory bandwidth/latency, and drawing clear architectural conclusions and recommendations.
 * Strong communication and presentation skills, with experience representing technical positions in vendor meetings, technical reviews, and multi-functional internal reviews. Ability to work across functions (architecture, design, systems, sourcing, operations) and regions, driving alignment and decisions without direct authority.

Ways to stand out from the crowd:

 * Direct experience defining or architecting HBM, GDDR, or high-speed LPDDR solutions for GPUs, AI accelerators, or high-performance SoCs.
 * Hands-on work with advanced packaging (e.g., 2.5D/3D, CoWoS, multi-chip modules) involving high-bandwidth memory interfaces.
 * Prior ownership of memory-related driven teardowns or benchmarking programs, with clear examples of how results influenced product or technology direction.
 * Established relationships with major memory vendors and a history of successful roadmap or co-development engagements.

## Description

NVIDIA's SoC Product Architecture team defines the platforms that power AI, graphics, and accelerated computing across data center, automotive, client, and edge products. As a Senior SoC Product Architect, Memory Ecosystem, you will drive NVIDIA's external memory ecosystem across DRAM and non-volatile flash, working with major memory vendors to align roadmaps, co-innovate new technologies, and ensure our SoC portfolio delivers industry-leading bandwidth, latency, power, and cost.

What you'll be doing:

 * Partner with all major memory vendors to understand their technology and product roadmaps (e.g., DDR/LPDDR, GDDR, HBM, NAND, emerging NVM) and align them with NVIDIA's SoC and platform roadmaps.
 * Steer vendor roadmaps by articulating NVIDIA's performance, power, capacity, form-factor, and reliability requirements, translating SoC and system needs into clear, data-driven feedback and requests.
 * Innovate new DRAM solutions in collaboration with vendors, exploring novel architectures, signaling, packaging, and power-management techniques to meet the bandwidth, latency, and power requirements of future NVIDIA SoCs and systems.
 * Work closely with SoC architects, memory controller designers, and board/system teams to co-optimize SoC + memory subsystem architecture, including channel topologies, speed grades, rank/stack configurations, and error-management strategies.
 * Represent NVIDIA at regular vendor technical reviews and key technical/roadmap meetings, presenting consolidated SoC roadmap needs, performance data, and proposals, and driving clear follow-ups and decisions.
 * Collaborate with sourcing, operations, substrate and PCB design, and quality teams to factor supply, cost, and reliability considerations into memory technology choices and long-term ecosystem strategy.